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THS7313 데이터시트(PDF) 2 Page - Texas Instruments

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부품명 THS7313
상세설명  3-Channel Low Power SDTV Video Amplifier with I2C Control, 6-dB Gain, SAG Correction, 2:1 Input MUX, and Selectable Input Bias Modes
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제조업체  TI [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI - Texas Instruments

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DESCRIPTION (CONTINUED)
ABSOLUTE MAXIMUM RATINGS
DISSIPATION RATINGS
THS7313
SLOS483 – NOVEMBER 2005
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated
circuits be handled with appropriate precautions. Failure to observe proper handling and installation
procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision
integrated circuits may be more susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
As part of the THS7313 flexibility, the 2:1 MUX input can be selected for ac or dc coupled inputs. The ac coupled
modes include a sync-tip clamp option for CVBS or Y' signals, or a fixed bias for the C/P'B/P'R channels. The dc
input options include a dc input or a dc + 135-mV input offset shift to allow for a full sync dynamic range at the
output with 0-V input.
PACKAGING/ORDERING INFORMATION
TRANSPORT MEDIA,
PACKAGED DEVICES(1)
PACKAGE TYPE
QUANTITY
THS7313PW
Rails, 70
TSSOP-20
THS7313PWR
Tape and reel, 2000
(1)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com
over operating free-air temperature range (unless otherwise noted)(1)
UNIT
VSS
Supply voltage, VS+ to GND
5.5 V
VI
Input voltage
–0.4V to VS+
IO
Output current
±125 mA
Continuous power dissipation
See Dissipation Rating Table
TJ
Maximum junction temperature, any condition(2)
150
°C
TJ
Maximum junction temperature, continuous operation, long term reliability(3)
125
°C
Tstg
Storage temperature range
–65
°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
300
°C
HBM
2000 V
ESD ratings
CDM
750 V
MM
100 V
(1)
Stresses above those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied Exposure to absolute maximum rated conditions for extended periods may degrade device reliability.
(2)
The absolute maximum junction temperature under any condition is limited by the constraints of the silicon process.
(3)
The absolute maximum junction temperature for continuous operation is limited by the package constraints. Operation above this
temperature may result in reduced reliability and/or lifetime of the device.
POWER RATING(1)
θ
JC
θ
JA
(TJ = 125°C)
PACKAGE
(
°C/W)
(
°C/W)
TA = 25°C
TA = 85°C
TSSOP – 20 (PW)
32.3
83(2)
1.2 W
0.48 W
(1)
Power rating is determined with a junction temperature of 125
°C. This is the point where distortion starts to substantially increase and
long-term reliability starts to be reduced. Thermal management of the final PCB strives to keep the junction temperature at or below
125
°C for best performance and reliability.
(2)
This data was taken with the JEDEC High-K test PCB. For the JEDEC low-K test PCB, the
θ
JA is 125.8°C.
2


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