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74ALVCH16501DLG4 데이터시트(PDF) 3 Page - Texas Instruments |
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74ALVCH16501DLG4 데이터시트(HTML) 3 Page - Texas Instruments |
3 / 13 page www.ti.com 1D C1 CLK 1D C1 CLK B1 OEAB CLKAB LEAB LEBA CLKBA OEBA A1 1 55 2 28 30 27 3 54 To 17 Other Channels Pin numbers shown are for the DGG and DL packages. SN74ALVCH16501 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCES024J – JULY 1995 – REVISED OCTOBER 2004 FUNCTION TABLE(1) INPUTS OUTPUT B OEAB LEAB CLKAB A L X X X Z H H X L L H H X H H H L ↑ L L H L ↑ H H H L H X B0(2) H L L X B0(3) (1) A-to-B data flow is shown; B-to-A flow is similar, but uses OEBA, LEBA, and CLKBA. (2) Output level before the indicated steady-state input conditions were established, provided that CLKAB was high before LEAB went low (3) Output level before the indicated steady-state input conditions were established space LOGIC DIAGRAM (POSITIVE LOGIC) 3 |
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