전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

MC10EP51DR2G 데이터시트(PDF) 1 Page - ON Semiconductor

부품명 MC10EP51DR2G
상세설명  3.3V / 5V ECL D Flip?묯lop with Reset and Differential Clock
Download  11 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  ONSEMI [ON Semiconductor]
홈페이지  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MC10EP51DR2G 데이터시트(HTML) 1 Page - ON Semiconductor

  MC10EP51DR2G Datasheet HTML 1Page - ON Semiconductor MC10EP51DR2G Datasheet HTML 2Page - ON Semiconductor MC10EP51DR2G Datasheet HTML 3Page - ON Semiconductor MC10EP51DR2G Datasheet HTML 4Page - ON Semiconductor MC10EP51DR2G Datasheet HTML 5Page - ON Semiconductor MC10EP51DR2G Datasheet HTML 6Page - ON Semiconductor MC10EP51DR2G Datasheet HTML 7Page - ON Semiconductor MC10EP51DR2G Datasheet HTML 8Page - ON Semiconductor MC10EP51DR2G Datasheet HTML 9Page - ON Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 1 / 11 page
background image
© Semiconductor Components Industries, LLC, 2006
November, 2006 − Rev. 6
1
Publication Order Number:
MC10EP51/D
MC10EP51, MC100EP51
3.3V / 5VECL D Flip−Flop
with Reset and Differential
Clock
Description
The MC10/100EP51 is a differential clock D flip−flop with reset.
The device is functionally equivalent to the EL51 and LVEL51
devices.
The reset input is an asynchronous, level triggered signal. Data
enters the master portion of the flip−flop when the clock is LOW and is
transferred to the slave, and thus the outputs, upon a positive transition
of the clock. The differential clock inputs of the EP51 allow the device
to be used as a negative edge triggered flip-flop.
The differential input employs clamp circuitry to maintain stability
under open input conditions. When left open, the CLK input will be
pulled down to VEE and the CLK input will be biased at VCC/2.
The 100 Series contains temperature compensation.
Features
350 ps Typical Propagation Delay
Maximum Frequency > 3 GHz Typical
PECL Mode Operating Range: VCC = 3.0 V to 5.5 V
with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V
with VEE = −3.0 V to −5.5 V
Open Input Default State
Safety Clamp on Inputs
Pb−Free Packages are Available
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Package
H
= MC10
K
= MC100
5S
= MC10
3N = MC100
M
= Date Code
SOIC−8
D SUFFIX
CASE 751
MARKING DIAGRAMS*
TSSOP−8
DT SUFFIX
CASE 948R
ALYWG
G
HP51
ALYWG
G
KP51
1
8
1
8
1
8
http://onsemi.com
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
ORDERING INFORMATION
1
8
DFN8
MN SUFFIX
CASE 506AA
14
14
(Note: Microdot may be in either location)
HEP51
ALYW
G
1
8
KEP51
ALYW
G
1
8


유사한 부품 번호 - MC10EP51DR2G

제조업체부품명데이터시트상세설명
logo
ON Semiconductor
MC10EP51DR2G ONSEMI-MC10EP51DR2G Datasheet
156Kb / 11P
   ECL D Flip-Flop with Reset and Differential Clock
November, 2012 ??Rev. 10
More results

유사한 설명 - MC10EP51DR2G

제조업체부품명데이터시트상세설명
logo
ON Semiconductor
MC10EP52 ONSEMI-MC10EP52_06 Datasheet
162Kb / 12P
   3.3V / 5V ECL Differential Data and Clock D Flip?묯lop
December, 2006 ??Rev. 6
MC10EP29 ONSEMI-MC10EP29_06 Datasheet
173Kb / 11P
   3.3V / 5V ECL Dual Differential Data and Clock D Flip?묯lop With Set and Reset
December, 2006 ??Rev. 4
MC10EP31 ONSEMI-MC10EP31_06 Datasheet
158Kb / 11P
   3.3V / 5V ECL D Flip?묯lop with Set and Reset
December, 2006 ??Rev. 9
MC10EP51 ONSEMI-MC10EP51 Datasheet
76Kb / 8P
   3.3V / 5V ECL D Flip-Flop with Reset and Differential Clock
April, 2001 ??Rev. 3
MC100EL29 ONSEMI-MC100EL29_06 Datasheet
116Kb / 6P
   5V ECL Dual Differential Data and Clock D Flip?묯lop With Set and Reset
October, 2006 ??Rev. 4
MC100LVEL29 ONSEMI-MC100LVEL29_06 Datasheet
120Kb / 6P
   3.3V ECL Dual Differential Data and Clock D Flip?묯lop With Set and Reset
November, 2006 ??Rev. 5
MC10EP131 ONSEMI-MC10EP131 Datasheet
90Kb / 10P
   3.3V / 5V ECL Quad D Flip-Flop with Set, Reset, and Differential Clock
January, 2004 ??Rev. 7
MC100EL30 ONSEMI-MC100EL30_06 Datasheet
109Kb / 6P
   5V ECL Triple D Flip?묯lop with Set and Reset
October, 2006 ??Rev. 5
MC100LVEL30 ONSEMI-MC100LVEL30_06 Datasheet
114Kb / 6P
   3.3V ECL Triple D Flip?묯lop with Set and Reset
November, 2006 ??Rev. 7
logo
Micrel Semiconductor
SY10EP51V MICREL-SY10EP51V_09 Datasheet
575Kb / 8P
   5V/3.3V D FLIP-FLOP WITH RESET AND DIFFERENTIAL CLOCK
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11


데이터시트 다운로드

Go To PDF Page


링크 URL




개인정보취급방침
ALLDATASHEET.CO.KR
ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com