전자부품 데이터시트 검색엔진 |
|
MC10EP445FAR2G 데이터시트(PDF) 1 Page - ON Semiconductor |
|
MC10EP445FAR2G 데이터시트(HTML) 1 Page - ON Semiconductor |
1 / 18 page © Semiconductor Components Industries, LLC, 2006 July, 2006 − Rev. 11 1 Publication Order Number: MC10EP445/D MC10EP445, MC100EP445 3.3V/5VECL 8−Bit Serial/Parallel Converter Description The MC10/100EP445 is an integrated 8–bit differential serial to parallel data converter with asynchronous data synchronization. The device has two modes of operation. CKSEL HIGH mode is designed to operate NRZ data rates of up to 3.3 Gb/s, while CKSEL LOW mode is designed to operate at twice the internal clock data rate of up to 5.0 Gb/s. The conversion sequence was chosen to convert the first serial bit to Q0, the second bit to Q1, etc. Two selectable differential serial inputs, which are selected by SINSEL, provide this device with loop−back testing capability. The MC10/100EP445 has a SYNC pin which, when held high for at least two consecutive clock cycles, will swallow one bit of data shifting the start of the conversion data from Dn to Dn+1. Each additional shift requires an additional pulse to be applied to the SYNC pin. Control pins are provided to reset and disable internal clock circuitry. Additionally, VBB pin is provided for single−ended input condition. The 100 Series contains temperature compensation. Features • 1530 ps Propagation Delay • 5.0 Gb/s Typical Data Rate for CLKSEL LOW Mode • Differential Clock and Serial Inputs • VBB Output for Single-Ended Input Applications • Asynchronous Data Synchronization (SYNC) • Asynchronous Master Reset (RESET) • PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V • NECL Mode Operating Range: VCC = 0 V with VEE = −3.0 V to −5.5 V • Open Input Default State • CLK ENABLE Immune to Runt Pulse Generation • Pb−Free Packages are Available* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. LQFP−32 FA SUFFIX CASE 873A MARKING DIAGRAM* *For additional marking information, refer to Application Note AND8002/D. http://onsemi.com MCxxx EP445 AWLYYWWG xxx = 10 or 100 A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week G = Pb−Free Package See detailed ordering and shipping information in the package dimensions section on page 16 of this data sheet. ORDERING INFORMATION |
유사한 부품 번호 - MC10EP445FAR2G |
|
유사한 설명 - MC10EP445FAR2G |
|
|
링크 URL |
개인정보취급방침 |
ALLDATASHEET.CO.KR |
ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |