UTCBA9741

LINEAR INTEGRATED CIRCUIT

QW-R103-017,B

PARAMETER

SYMBOL

TEST CONIDITIONS

MIN

TYP. MAX UNIT

On Duty Cycle

Divide Vref using 13 k

Ω and27 kΩ

45

55

65

%

Input Bias Current

DT1,DT2=2.0V

0.1

1

µ

A

Latch Mode Source Current

DT1,DT2=0V

200

560

µ

A

Latch Input Voltage

2.28

2.48

V

LOW-VOLTAGE INPUT MISS-OPERATION PREVENTION CIRCUIT

Threshold Voltage

2.53

V

ERROR AMPLIFIER

Input Offset Voltage

6

mV

Input Offset Current

30

nA

Input Bias Current

15

100

nA

Open Circuit Gain

AV

70

85

dB

Common-mode Input Voltage range

VOM

Vcc=3.6~35V

0.3

1.6

V

Common-mode Rejection Ratio

CMRR

60

80

dB

Maximum Output Voltage

2.3

2.5

V

Minimum Input Voltage

0.7

0.9

V

Output Sink Current

FB=1.25V

3

20

mA

Output Source Current

FB=1.25V

45

75

µ

A

PWM COMPARATOR

Duty Cycle =0%

1.79

1.97

2.15

V

Input Threshold Voltage

(fosc=10kHz)

Duty Cycle =100%

1.32

1.48

1.64

V

OUTPUT BLOCK

Saturation Voltage

Io=75mA

0.8

1.2

V

Leak Current

Vo=35V

0

5

µ

A

TOTAL DEVICE

Standby Current

Iccs

When output is off

1.3

1.8

mA

Average Current Consumption

Ω

1.6

2.3

mA

TIMING CHART

1.97V

1.05V

1.48V

1.64V

2.53V

tDT

>

=

Vcc 3.6V

Triangular wave output(from oscillator)

Error amplifier output

Dead-time input voltage

Short protection comparator

PWM comparator output

Output waveform

SCP waveform

Short protection comparator output

Power supply voltage

Lockout release

Figure. 1