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MC74VHCT259ADTR2 데이터시트(PDF) 5 Page - ON Semiconductor

부품명 MC74VHCT259ADTR2
상세설명  8?묪it Addressable Latch/1?뭥f?? Decoder CMOS Logic Level Shifter with LSTTL?묬ompatible Inputs
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제조업체  ONSEMI [ON Semiconductor]
홈페이지  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MC74VHCT259ADTR2 데이터시트(HTML) 5 Page - ON Semiconductor

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5
DC CHARACTERISTICS (Voltages Referenced to GND)
VCC
TA = 25°C
TA ≤ 85°C
−55
°C ≤ TA ≤ 125°C
Symbol
Parameter
Condition
(V)
Min
Typ
Max
Min
Max
Min
Max
Unit
VIH
Minimum High−Level
Input Voltage
4.5 to 5.5
2
2
2
V
VIL
Maximum Low−Level
Input Voltage
4.5 to 5.5
0.8
0.8
0.8
V
VOH
Maximum High−Level
Output Voltage
VIN = VIH or VIL
IOH = −50 mA
4.5
4.4
4.5
4.4
4.4
V
VIN = VIH or VIL
IOH = −8 mA
4.5
3.94
3.8
3.66
VOL
Maximum Low−Level
Output Voltage
VIN = VIH or VIL
IOL = 50 mA
4.5
0
0.1
0.1
0.1
V
VIN = VIH or VIL
IOH = 8 mA
4.5
0.36
0.44
0.52
IIN
Input Leakage Current
VIN = 5.5 V or GND
0 to 5.5
±0.1
±1.0
±1.0
mA
ICC
Maximum Quiescent
Supply Current
VIN = VCC or GND
5.5
4.0
40.0
40.0
mA
ICCT
Additional Quiescent
Supply Current
(per Pin)
Any one input:
VIN = 3.4 V
All other inputs:
VIN = VCC or GND
5.5
1.35
1.5
1.5
mA
IOPD
Output Leakage Current
VOUT = 5.5 V
0
0.5
5
5
mA
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns)
Symbol
Parameter
Test Conditions
TA = 25°C
TA = ≤ 85°C
−55
°C ≤ TA ≤ 125°C
Unit
Min
Typ
Max
Min
Max
Min
Max
tPLH,
tPHL
Maximum Propagation
Delay, Data to Output
(Figures 6 and 11)
VCC = 3.3 ± 0.3V
CL = 15pF
CL = 50pF
8.5
8.5
11.0
16.0
1.0
1.0
13.0
18.0
1.0
1.0
13.0
18.0
ns
VCC = 5.0 ± 0.5V
CL = 15pF
CL = 50pF
6.0
6.0
8.0
10.0
1.0
1.0
9.5
11.5
1.0
1.0
9.5
11.5
tPLH,
tPHL
Maximum Propagation
Delay, Address Select
to Output
(Figures 7 and 11)
VCC = 3.3 ± 0.3V
CL = 15pF
CL = 50pF
8.5
8.5
11.0
16.0
1.0
1.0
13.0
18.0
1.0
1.0
13.0
18.0
ns
VCC = 5.0 ± 0.5V
CL = 15pF
CL = 50pF
6.0
8.5
8.0
10.0
1.0
1.0
9.5
11.5
1.0
1.0
9.5
11.5
tPLH,
tPHL
Maximum Propagation
Delay, Enable to Output
(Figures 8 and 11)
VCC = 3.3 ± 0.3V
CL = 15pF
CL = 50pF
8.5
8.5
11.0
16.0
1.0
1.0
13.0
18.0
1.0
1.0
13.0
18.0
ns
VCC = 5.0 ± 0.5V
CL = 15pF
CL = 50pF
6.0
8.5
8.0
10.0
1.0
1.0
9.5
11.5
1.0
1.0
9.5
11.5
tPHL
Maximum Propagation
Delay, Reset to Output
(Figures 9 and 11)
VCC = 3.3 ± 0.3V
CL = 15pF
CL = 50pF
8.5
8.5
11.0
16.0
1.0
1.0
13.0
18.0
1.0
1.0
13.0
18.0
ns
VCC = 5.0 ± 0.5V
CL = 15pF
CL = 50pF
6.0
8.5
8.0
10.0
1.0
1.0
9.5
11.5
1.0
1.0
9.5
11.5
CIN
Maximum Input
Capacitance
6
10
10
10
pF
CPD
Power Dissipation Capacitance (Note 5)
Typical @ 25
°C, VCC = 5.0V
pF
30
5. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD  VCC  fin + ICC. CPD is used to determine the no−load dynamic
power consumption; PD = CPD  VCC2  fin + ICC  VCC.


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