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CAT24C256XIT3 데이터시트(PDF) 3 Page - Catalyst Semiconductor |
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CAT24C256XIT3 데이터시트(HTML) 3 Page - Catalyst Semiconductor |
3 / 14 page CAT24C256 3 Doc No. 04, Rev. D © 2007 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice A.C. CHARACTERISTICS(1) VCC = .8 V to 5.5 V, TA = -40°C to 85°C, unless otherwise specified. Symbol Parameter 1.8 V - 5.5 V 2.5 V - 5.5 V units Min Max Min Max FSCL Clock Frequency 00 400 kHz TI(2) Noise Suppression Time Constant at SCL, SDA Inputs 0. 0. µs tAA SCL Low to SDA Data Out 3.5 0.9 µs tBUF(2) Time the Bus Must be Free Before a New Transmission Can Start 4.7 .3 µs tHD:STA Start Condition Hold Time 4 0.6 µs tLOW Clock Low Period 4.7 .3 µs tHIGH Clock High Period 4 0.6 µs tSU:STA Start Condition Setup Time 4.7 0.6 µs tHD:DAT Data In Hold Time 0 0 µs tSU:DAT Data In Setup Time 0.25 0. µs tR(2) SDA and SCL Rise Time 0.3 µs tF(2) SDA and SCL Fall Time 0.3 0.3 µs tSU:STO Stop Condition Setup Time 4 0.6 µs tDH Data Out Hold Time 0. 0. µs tWR Write Cycle Time 5 5 ms tPU(2), (3) Power-up to Ready Mode ms notes: () Test conditions according to “A.C. Test Conditions” table. (2) Tested initially and after a design or process change that affects this parameter. (3) tPU is the delay between the time VCC is stable and the device is ready to accept commands. A.C. TEST COnDITIOnS Input Levels 0.2 x VCC to 0.8 x VCC Input Rise and Fall Times ≤ 50 ns Input Reference Levels 0.3 x VCC, 0.7 x VCC Output Reference Levels 0.5 x VCC Output Load Current Source: IOL = 3 mA (VCC ≥ 2.5 V); IOL = mA (VCC < 2.5 V); CL = 00 pF |
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