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MC100LVEL91DW 데이터시트(PDF) 2 Page - ON Semiconductor |
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MC100LVEL91DW 데이터시트(HTML) 2 Page - ON Semiconductor |
2 / 6 page MC100LVEL91 http://onsemi.com 2 ECL ECL ECL Figure 1. SO−20 Pinout (Top View) and Logic Diagram 17 18 16 15 14 13 12 4 3 5678 9 11 10 19 20 2 1 Table 1. PIN DESCRIPTION Function PECL/LVPECL Inputs ECL Outputs PECL Reference Voltage Output Positive Supply Negative Supply Ground Pin Dn, Dn Qn, Qn PECL VBB VCC VEE GND Warning: All VCC, VEE, and GND pins must be externally connected to Power Supply to guarantee proper operation. PECL/ LVPECL PECL/ LVPECL PECL/ LVPECL * All VCC pins are tied together on the die. Table 2. ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor 75 kW Internal Input Pullup Resistor 75 kW ESD Protection Human Body Model Machine Model Charged Device Model > 2 kV > 100 V > 2 kV Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Pb Pkg Pb−Free Pkg Level 1 Level 3 Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in Transistor Count 282 Devices Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. |
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