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SY88883V 데이터시트(PDF) 1 Page - Micrel Semiconductor |
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SY88883V 데이터시트(HTML) 1 Page - Micrel Semiconductor |
1 / 8 page 1 SY88883V Micrel, Inc. M9999-081005 hbwhelp@micrel.com or (408) 955-1690 DESCRIPTION s Multi-rate up to 3.2Gbps operation s Wide gain-bandwidth product • 38dB differential gain • 2.2GHz 3dB bandwidth s Low noise 50 Ω CML data outputs • 800mVPP output swing • 60ps edge rates • 5ps RMS typ. random jitter • 15psPP typ. deterministic jitter s Chatter-free Signal Detect (SD) output • 4.6dB electrical hysteresis • OC-TTL output with internal 5k Ω pull-up resistor s Programmable SD sensitivity using single external resistor s Internal 50 Ω data input termination s Wide operating range • Single 3.3V ±10% or 5V ±10% power supply • –40 °C to +85°C industrial temperature range s Available in a tiny 10-pin MSOP (3mm ××××× 3mm) package FEATURES 3.3V/5V 3.2Gbps CML LOW-POWER LIMITING POST AMPLIFIER WITH TTL SD SY88883V APPLICATIONS s 1.25Gbps and 2.5Gbps Gigabit Ethernet s 1.062Gbps and 2.125Gbps Fibre Channel s 155Mbps, 622Mbps, 1.25Gbps and 2.5Gbps SONET/SDH s Gigabit interface converter (GBIC) s Small form factor (SFF) and small form factor pluggable (SFP) transceivers s Parallel 10G Ethernet s High-gain line driver and line receiver Rev.: B Amendment: /0 Issue Date: August 2005 The SY88883V low-power, limiting post amplifier is designed for use in fiber optic receivers. The device connects to typical transimpedance amplifiers (TIAs). The linear signal output from TIAs can contain significant amounts of noise and may vary in amplitude over time. The SY88883V quantizes these signals and outputs typically 800mVPP voltage-limited waveforms. The SY88883V operates from a single +3.3V ±10% or +5V ±10% power supply, over the industrial temperature range of –40 °C to +85°C. With its wide bandwidth and high- gain, signals with data rates up to 3.2Gbps and as small as 10mVpp can be amplified to drive devices with CML inputs or AC-coupled PECL inputs. The SY88883V generates a signal detect (SD) open- collector TTL output with internal 5k Ω pull-up resistor. A programmable signal detect level set pin (SD LVL) sets the sensitivity of the input amplitude detection. SD asserts high if the input amplitude rises above the threshold set by SD LVL and de-asserts low otherwise. Typically 4.6dB SD hysteresis is provided to prevent chattering. All support documentation can be found on Micrel’s web site at www.micrel.com. TYPICAL PERFORMANCE FUNCTIONAL BLOCK DIAGRAM Limiting Amplifer CML Buffer GND 2.8k Ω 50 Ω Level Detect SD DIN /DIN VCC VCC SDLVL DOUT /DOUT 5k Ω OC-TTL Buffer VCC –1.3V 3.3V, 25 °C, 10mV PP Input @2.5Gbps 223–1 PRBS, RLOAD = 50Ω to VCC TIME (100ps/div.) |
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