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SY88973BL 데이터시트(PDF) 8 Page - Micrel Semiconductor

부품명 SY88973BL
상세설명  3.3V 3.2Gbps CML Low Power Limiting Post Amplifier with TTL LOS
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제조업체  MICREL [Micrel Semiconductor]
홈페이지  http://www.micrel.com
Logo MICREL - Micrel Semiconductor

SY88973BL 데이터시트(HTML) 8 Page - Micrel Semiconductor

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Micrel, Inc.
SY88973BL
February 2007
8
M9999-020207-A
hbwhelp@micrel.com or (408) 955-1690
Description
The SY88973BL low-power, limiting post amplifier
operates from a single +3.3V ±10% power supply, over an
industrial temperature range of –40°C to +85°C. Signals
with data rates up to 3.2Gbps and as small as 10mVPP
can be amplified. Figure 1 shows the allowed input voltage
swing. The SY88973BL generates a LOS output, providing
feedback to /EN for output stability. LOSLVL sets the
sensitivity of the input amplitude detection.
Input Amplifier/Buffer
The SY88973BL’s inputs are internally terminated with
50Ω-to-REF. Unless unaffected by this internal termination
scheme, upstream devices need to be AC-coupled to the
SY88973BL’s inputs. Figure 2 shows a simplified
schematic of the input structure.
The high sensitivity of the input amplifier detects and
amplifies signals as small as 10mVPP. The input amplifier
allows input signals as large as 1800mVPP. Input signals
are linearly amplified with a typical 38dB differential
voltage gain. Since it is a limiting amplifier, the SY88973BL
outputs, typically 800mVPP, voltage-limited waveforms for
input signals that are greater than 10mVPP. Applications
requiring the SY88973BL to operate with high gain should
have the upstream TIA placed as close as possible to the
SY88973BL’s input pins to ensure the device’s best
performance.
Output Buffer
The SY88973BL’s CML output buffer is designed to drive
50Ω lines. The output buffer requires appropriate
termination for proper operation. An external 50Ω resistor-
to-VCC or equivalent for each output pin provides this.
Figure 3 shows a simplified schematic of the output
structure and includes an appropriate termination method.
Of course, driving a downstream device with a CML input
that is internally terminated with 50Ω-to-VCC eliminates the
need for external termination. As noted in the previous
section, the amplifier outputs, typically, 800mVPP,
waveforms across 25Ω total loads. The output buffer, thus,
switches typically 16mA tail-current. Figure 4 shows the
power supply current measurement which excludes the
16mA tail-current.
Loss-of-Signal (LOS)
The SY88973BL incorporates a chatter-free, LOS open-
collector TTL output. For proper operation, an external
4.75kΩ to 10kΩ pull-up resistor between LOS and Vcc is
required. LOS is used to determine that the input
amplitude is too small to be considered a valid input. LOS
asserts high if the input amplitude falls below the threshold
set by LOSLVL and de-asserts low otherwise. LOS can be
fed back to the enable (/EN) input to maintain output
stability under a loss of signal condition. /EN de-assert low
the true output signal without removing the input signals.
Typically, 4.6dB LOS hysteresis is provided to prevent
chattering.
Loss-of-Signal Level Set
A programmable, loss-of-signal level set pin sets the
threshold of the input amplitude detection. Connecting an
external resistor between VCC and LOSLVL sets the
voltage at LOSLVL. This voltage ranges from VCC to VREF.
The external resistor creates a voltage divider between
VCC and REF as shown in Figure 6. If desired, an
appropriate external voltage may be applied rather than
using a resistor. The relationship between VLOSLVL and
RLOSLVL is given by:
8
.
2
3
.
1
+
=
LOSLVL
LOSLVL
CC
LOSLVL
R
R
V
V
where voltages are in volts and resistances are in kΩ.
The smaller the external resistor, which implies a smaller
voltage difference from LOSLVL to VCC, the lower the LOS
sensitivity. Hence, larger input amplitude is required to de-
assert LOS. The “Typical Operating Characteristics”
section contains graphs showing the relationship between
the input amplitude detection sensitivity and VLOSLVL or
RLOSLVL.
Hysteresis
The SY88973BL provides typically 4.6dB LOS electrical
hysteresis. By definition, a power ratio measured in dB is
10log (power ratio). Power is calculated as V2IN/R for an
electrical signal. Hence, the same ratio can be stated as
20log (voltage ratio). While in linear mode, the electrical
voltage input changes linearly with the optical power and
the ratios change linearly as well. Therefore, the optical
hysteresis in dB is half the electrical hysteresis in dB given
in the datasheet. The SY88973BL provides typically 2.3dB
LOS optical hysteresis. As the SY88973BL is an electrical
device, this datasheet refers to hysteresis in electrical
terms. With 4.6dB LOS hysteresis, a voltage factor of 1.7
is required to de-assert LOS.
Hysteresis and Sensitivity Improvement
If increased LOS sensitivity and hysteresis are required,
an application note entitled “Notes on Sensitivity and
Hysteresis in Micrel Post Amplifiers” is available at:
http://www.micrel.com/_PDF/HBW/App-Notes/an-45.pdf.


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