전자부품 데이터시트 검색엔진 |
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CX82C54 데이터시트(PDF) 5 Page - Intersil Corporation |
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CX82C54 데이터시트(HTML) 5 Page - Intersil Corporation |
5 / 22 page 5 82C54 Functional Diagram CONTROL WORD REGISTER READ/ WRITE LOGIC DATA/ BUS BUFFER COUNTER 2 COUNTER 1 COUNTER 0 INTERNAL BUS CONTROL LOGIC CONTROL WORD REGISTER STATUS LATCH STATUS REGISTER CLK n GATE n OUT n OUT 2 GATE 2 CLK 2 OUT 1 GATE 1 CLK 1 OUT 0 GATE 0 CLK 0 WR RD D7 - D0 A0 A1 CS OLM OLL CE CRM CRL COUNTER INTERNAL BLOCK DIAGRAM 8 Pin Description SYMBOL DIP PIN NUMBER TYPE DEFINITION D7 - D0 1 - 8 I/O DATA: Bi-directional three-state data bus lines, connected to system data bus. CLK 0 9 I CLOCK 0: Clock input of Counter 0. OUT 0 10 O OUT 0: Output of Counter 0. GATE 0 11 I GATE 0: Gate input of Counter 0. GND 12 GROUND: Power supply connection. OUT 1 13 O OUT 1: Output of Counter 1. GATE 1 14 I GATE 1: Gate input of Counter 1. CLK 1 15 I CLOCK 1: Clock input of Counter 1. GATE 2 16 I GATE 2: Gate input of Counter 2. OUT 2 17 O OUT 2: Output of Counter 2. CLK 2 18 I CLOCK 2: Clock input of Counter 2. A0, A1 19 - 20 I ADDRESS: Select inputs for one of the three counters or Control Word Register for read/write operations. Normally connected to the system address bus. CS 21 I CHIP SELECT: A low on this input enables the 82C54 to respond to RD and WR signals. RD and WR are ignored otherwise. RD 22 I READ: This input is low during CPU read operations. WR 23 I WRITE: This input is low during CPU write operations. VCC 24 - VCC: The +5V power supply pin. A 0.1µF capacitor between pins VCC and GND is recommended for decoupling. A1 A0 SELECTS 0 0 Counter 0 0 1 Counter 1 1 0 Counter 2 1 1 Control Word Register |
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