ICL7662 datasheet(2/10 Pages) INTERSIL

2 page

Functional Block Diagram

Ordering Information

PART

NUMBER

TEMP. RANGE

(oC)

PACKAGE

PKG.

DWG. #

ICL7662CPA

0 to 70

8 Ld PDIP

E8.3

ICL7662CPAZ

(Note)

0 to 70

8 Ld PDIP*

(Pb-free)

E8.3

ICL7662CBD-0

0 to 70

14 Ld SOIC (N)

M14.15

ICL7662CBD

0 to 70

14 Ld SOIC (N)

M14.15

ICL7662IPA

-40 to 85

8 Ld PDIP

E8.3

ICL7662IBD

-40 to 85

14 Ld SOIC (N)

M14.15

*Pb-free PDIPs can be used for through hole wave solder

processing only. They are not intended for use in Reflow solder

processing. applications.

NOTE: Intersil Pb-free plus anneal products employ special Pb-free

material sets; molding compounds/die attach materials and 100%

matte tin plate termination finish, which are RoHS compliant and

compatible with both SnPb and Pb-free soldering operations.

Intersil Pb-free products are MSL classified at Pb-free peak reflow

temperatures that meet or exceed the Pb-free requirements of

IPC/JEDEC J STD-020.

OSCILLATOR

÷ 2

VOLTAGE

REGULATOR

LOGIC

NETWORK

OSC

V+

CAP+

CAP-

VOUT

VOLTAGE

LEVEL

TRANSLATOR

TEST

ICL7662

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