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AM41DL1634DB45IS 데이터시트(PDF) 15 Page - Advanced Micro Devices |
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AM41DL1634DB45IS 데이터시트(HTML) 15 Page - Advanced Micro Devices |
15 / 63 page 14 Am41DL16x4D P R E L IMINARY Table 4. Device Bus Operations—Flash Byte Mode, CIOf = V IL; SRAM Byte Mode, CIOs = VSS Legend: L = Logic Low = V IL, H = Logic High = VIH, VID = 8.5–12.5 V, VHH = 9.0 ± 0.5 V, X = Don’t Care, SA = SRAM Address Input, Byte Mode, SADD = Flash Sector Address, A IN = Address In (for Flash Byte Mode, DQ15 = A-1), DIN = Data In, DOUT = Data Out, DNU = Do Not Use Notes: 1. Other operations except for those indicated in this column are inhibited. 2. Do not apply CE#f = V IL, CE1#s = VIL and CE2s = VIH at the same time. 3. Don’t care or open LB#s or UB#s. 4. If WP#/ACC = VIL , the boot sectors will be protected. If WP#/ACC = VIH the boot sectors protection will be removed. If WP#/ACC = V ACC (9V), the program time will be reduced by 40%. 5. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “The autoselect mode provides manufacturer and device identification, and sector protection verification, through identifier codes output on DQ7–DQ0. The autoselect codes can be accessed in-system through the command register. Refer to the Autoselect Command Sequence section for more information.Sector/Sector Block Protection and Unprotection”. 6. If WP#/ACC = V IL, the two outermost boot sectors remain protected. If WP#/ACC = VIH, the two outermost boot sector protection depends on whether they were last protected or unprotected using the method described in “The autoselect mode provides manufacturer and device identification, and sector protection verification, through identifier codes output on DQ7–DQ0. The autoselect codes can be accessed in-system through the command register. Refer to the Autoselect Command Sequence section for more information.Sector/Sector Block Protection and Unprotection”. If WP#/ACC = VHH, all sectors will be unprotected. Operation (Notes 1, 2) CE#f CE1#s CE2s OE# WE# SA Addr. LB#s (Note 3) UB#s (Note 3) RESET# WP#/ACC (Note 4) DQ7– DQ0 DQ15– DQ8 Read from Flash L HX LH X A IN XX H L/H D OUT High-Z XL Write to Flash L HX HL X A IN XX H (Note 3) D IN High-Z XL Standby VCC ± 0.3 V HX XX X X X X VCC ± 0.3 V H High-Z High-Z XL Output Disable H L H H H SA X DNU DNU H L/H High-Z High-Z Flash Hardware Reset X HX X X X X X X L L/H High-Z High-Z XL Sector Protect (Note 5) L HX HL X SADD, A6 = L, A1 = H, A0 = L XX V ID L/H D IN X XL Sector Unprotect (Note 5) L HX HL X SADD, A6 = L, A1 = H, A0 = L XX V ID (Note 6) D IN X XL Temporary Sector Unprotect X HX XX X A IN XX V ID (Note 6) D IN High-Z XL Read from SRAM H L H L H SA A IN XX H X D OUT High-Z Write to SRAM H L H X L SA A IN XX H X D IN High-Z |
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