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PD128G90VE 데이터시트(PDF) 6 Page - Advanced Micro Devices |
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PD128G90VE 데이터시트(HTML) 6 Page - Advanced Micro Devices |
6 / 71 page October 28, 2004 Am29PDL128G 5 P R E L IM IN A R Y Figure 11. Input Waveforms and Measurement Levels .................. 52 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 53 Read-Only Operations ........................................................... 53 Figure 12. Read Operation Timings ................................................ 53 Figure 13. Page Read Operation Timings....................................... 54 Hardware Reset (RESET#) .................................................... 55 Figure 14. Reset Timings ................................................................ 55 Word/Double Word Configuration (WORD#) .......................... 56 Figure 15. WORD# Timings for Read Operations........................... 56 Figure 16. WORD# Timings for Write Operations........................... 56 Erase and Program Operations .............................................. 57 Figure 17. Program Operation Timings........................................... 58 Figure 18. Accelerated Program Timing Diagram........................... 58 Figure 19. Chip/Sector Erase Operation Timings ........................... 59 Figure 20. Back-to-back Read/Write Cycle Timings ....................... 60 Figure 21. Data# Polling Timings (During Embedded Algorithms).. 60 Figure 22. Toggle Bit Timings (During Embedded Algorithms)....... 61 Figure 23. DQ2 vs. DQ6.................................................................. 61 Temporary Sector Unprotect .................................................. 62 Figure 24. Temporary Sector Unprotect Timing Diagram .............. 62 Figure 25. Sector/Sector Block Protect and Unprotect Timing Diagram ............................................................. 63 Alternate CE# Controlled Erase and Program Operations ..... 64 Figure 26. Alternate CE# Controlled Write (Erase/Program) Operation Timings.......................................................................... 65 Erase And Programming Performance. . . . . . . . 66 Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 66 BGA Ball Capacitance . . . . . . . . . . . . . . . . . . . . . 66 Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 67 LAB080—80-Ball Fortified Ball Grid Array 15 x 10 mm package .............................................................. 67 Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 68 |
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