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6

FIGURE 1. AC Test Circuit

FIGURE 2. Waveform for Inverting and

Non-Inverting Functions

FIGURE 3. 3-STATE Output High Enable and

Disable Times for Low Voltage Logic

FIGURE 4. 3-STATE Output Low Enable and Disable Times for Low Voltage Logic

FIGURE 5. Propagation Delay, Pulse Width and

FIGURE 6. Setup Time, Hold Time and

Recovery Time for Low Voltage Logic

TEST

SWITCH

Open

GND

Symbol

3.3V

r 0.3V

2.5V

r 0.2V

1.8V

r 0.15V

1.5V

1.5V