전자부품 데이터시트 검색엔진 |
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X1227S8Z-2.7A 데이터시트(PDF) 3 Page - Intersil Corporation |
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X1227S8Z-2.7A 데이터시트(HTML) 3 Page - Intersil Corporation |
3 / 28 page 3 FN8099.2 May 8, 2006 PIN DESCRIPTIONS PIN ASSIGNMENTS Pin Number Symbol Brief Description SOIC TSSOP 13 X1 X1. The X1 pin is the input of an inverting amplifier and should be connected to one pin of a 32.768kHz quartz crystal. 24 X2 X2. The X2 pin is the output of an inverting amplifier and should be connected to one pin of a 32.768kHz quartz crystal.. 35 RESET Reset Output – RESET. This is a reset signal output. This signal notifies a host processor that the watchdog time period has expired or that the voltage has dropped below a fixed VTRIP threshold. It is an open drain active LOW output. 46 VSS VSS. 57 SDA Serial Data (SDA). SDA is a bidirectional pin used to transfer data into and out of the device. It has an open drain output and may be wire ORed with other open drain or open collector outputs. 68 SCL Serial Clock (SCL). The SCL input is used to clock all data into and out of the device. The input buffer on this pin is always active (not gated). 71 VBACK VBACK. This input provides a backup supply voltage to the device. VBACK supplies power to the device in the event the VCC supply fails. This pin can be connected to a battery, a Supercap or tied to ground if not used. 82 VCC VCC. NC = No internal connection X1227 X1 X2 VBACK VCC RESET SCL SDA VSS 1 2 3 4 7 8 6 5 8 LD TSSOP X1227 X1 X2 VBACK VCC RESET SCL SDA VSS 1 2 3 4 7 8 6 5 8 LD SOIC X1227 |
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