©2005 Fairchild Semiconductor Corporation

www.fairchildsemi.com

FIN24C Rev. 1.0.2

8

A third method of serialization can be accomplished with a free running bit clock

on the CKSI signal. This mode is enabled by grounding the CKREF signal and

driving the DIRI signal HIGH.

At power-up, the device is configured to accept a serialization clock from CKSI. If

a CKREF is received, the device enables the CKREF serialization mode. The

device remains in this mode even if CKREF is stopped. To re-enable this mode,

the device must be powered down and powered back up with “logic 0” on CKREF.

Figure 6. Serializer Timing Diagram Using Provided Bit Clock (No CKREF)

WORD n-1

WORD n-1

WORD n

No Data

No Data

DP[1:24]

DSO

CKS0

CKSI

STROBE

b1 b2 b3

b1 b2 b3

b4 b5 b6 b7

b22 b23 b24 b25 b26

WORD n+1

WORD n

Serializer Operation: (Figure 6),

DIRI = 1,

No CKREF