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SN74BCT574DBR 데이터시트(PDF) 1 Page - Texas Instruments

부품명 SN74BCT574DBR
상세설명  OCTAL TRANSPARENT D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
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SN54BCT574, SN74BCT574
OCTAL TRANSPARENT D-TYPE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SCBS074C – SEPTEMBER 1991 – REVISED MARCH 2003
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Operating Voltage Range of 4.5 V to 5.5 V
D State-of-the-Art BiCMOS Design
Significantly Reduces ICCZ
D Full Parallel Access for Loading
D ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1D
2D
3D
4D
5D
6D
7D
8D
GND
VCC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
CLK
SN54BCT574 ...J OR W PACKAGE
SN74BCT574 . . . DB, DW, N, OR NS PACKAGE
(TOP VIEW)
32
1 20 19
910 11 12 13
4
5
6
7
8
18
17
16
15
14
2Q
3Q
4Q
5Q
6Q
3D
4D
5D
6D
7D
SN54BCT574 . . . FK PACKAGE
(TOP VIEW)
description/ordering information
These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively
low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional
bus drivers, and working registers.
The eight flip-flops of the ’BCT574 devices are edge-triggered D-type flip-flops. On the positive transition of the
clock (CLK) input, the Q outputs are set to the logic levels that were set up at the data (D) inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus
lines without interface or pullup components.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP – N
Tube
SN74BCT574N
SN74BCT574N
SOIC
DW
Tube
SN74BCT574DW
BCT574
0
°C to 70°C
SOIC – DW
Tape and reel
SN74BCT574DWR
BCT574
SOP – NS
Tape and reel
SN74BCT574NSR
BCT574
SSOP – DB
Tape and reel
SN74BCT574DBR
BT574
CDIP – J
Tube
SNJ54BCT574J
SNJ54BCT574J
–55
°C to 125°C
CFP – W
Tube
SNJ54BCT574W
SNJ54BCT574W
LCCC – FK
Tube
SNJ54BCT574FK
SNJ54BCT574FK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Copyright
 2003, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.


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