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SST32HF202-70-4E-L3KE 데이터시트(PDF) 1 Page - Silicon Storage Technology, Inc

부품명 SST32HF202-70-4E-L3KE
상세설명  Multi-Purpose Flash (MPF) SRAM ComboMemory
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제조업체  SST [Silicon Storage Technology, Inc]
홈페이지  http://www.sst.com/
Logo SST - Silicon Storage Technology, Inc

SST32HF202-70-4E-L3KE 데이터시트(HTML) 1 Page - Silicon Storage Technology, Inc

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©2005 Silicon Storage Technology, Inc.
S71209-06-000
5/05
1
The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.
MPF and ComboMemory are trademarks of Silicon Storage Technology, Inc.
These specifications are subject to change without notice.
Data Sheet
FEATURES:
MPF + SRAM ComboMemory
– SST32HF202: 128K x16 Flash + 128K x16 SRAM
– SST32HF402: 256K x16 Flash + 128K x16 SRAM
– SST32HF802: 512K x16 Flash + 128K x16 SRAM
Single 2.7-3.3V Read and Write Operations
Concurrent Operation
– Read from or write to SRAM while
Erase/Program Flash
Superior Reliability
– Endurance: 100,000 Cycles (typical)
– Greater than 100 years Data Retention
Low Power Consumption:
– Active Current: 15 mA (typical) for
Flash or SRAM Read
– Standby Current: 20 µA (typical)
Flexible Erase Capability
– Uniform 2 KWord sectors
– Uniform 32 KWord size blocks
Fast Read Access Times:
– Flash: 70 ns
–SRAM: 70 ns
Latched Address and Data for Flash
Flash Fast Erase and Word-Program:
– Sector-Erase Time: 18 ms (typical)
– Block-Erase Time: 18 ms (typical)
– Chip-Erase Time: 70 ms (typical)
– Word-Program Time: 14 µs (typical)
– Chip Rewrite Time:
SST32HF202: 2 seconds (typical)
SST32HF402: 4 seconds (typical)
SST32HF802: 8 seconds (typical)
Flash Automatic Erase and Program Timing
– Internal VPP Generation
Flash End-of-Write Detection
– Toggle Bit
– Data# Polling
CMOS I/O Compatibility
JEDEC Standard Command Set
Conforms to Flash pinout
Packages Available
– 48-ball LFBGA (6mm x 8mm)
– 48-ball LBGA (10mm x 12mm)
(SST32HF802 only)
All non-Pb (lead-free) devices are RoHS compliant
PRODUCT DESCRIPTION
The SST32HF202/402/802 ComboMemory devices inte-
grate a 128K x16, 256K x16, 512K x16 CMOS flash mem-
ory bank with a 128K x16 CMOS SRAM memory bank in a
Multi-Chip Package (MCP), manufactured with SST’s pro-
prietary, high performance SuperFlash technology.
Featuring high performance Word-Program, the flash
memory bank provides a maximum Word-Program time of
14 µsec. The entire flash memory bank can be erased and
programmed word-by-word in typically 2 seconds for the
SST32HF202, 4 seconds for the SST32HF402, and 8 sec-
onds for the SST32HF802, when using interface features
such as Toggle Bit or Data# Polling to indicate the comple-
tion of Program operation. To protect against inadvertent
flash write, the SST32HF202/402/802 devices contain on-
chip hardware and software data protection schemes. The
SST32HF202/402/802 devices offer a guaranteed endur-
ance of 10,000 cycles. Data retention is rated at greater
than 100 years.
The SST32HF202/402/802 devices consist of two inde-
pendent memory banks with respective bank enable sig-
nals. The Flash and SRAM memory banks are
superimposed in the same memory address space. Both
memory banks share common address lines, data lines,
WE# and OE#. The memory bank selection is done by
memory bank enable signals. The SRAM bank enable sig-
nal, BES# selects the SRAM bank. The flash memory
bank enable signal, BEF# selects the flash memory bank.
The WE# signal has to be used with Software Data Protec-
tion (SDP) command sequence when controlling the Erase
and Program operations in the flash memory bank. The
SDP command sequence protects the data stored in the
flash memory bank from accidental alteration.
The SST32HF202/402/802 provide the added functionality
of being able to simultaneously read from or write to the
SRAM bank while erasing or programming in the flash
memory bank. The SRAM memory bank can be read or
written while the flash memory bank performs Sector-
Erase, Bank-Erase, or Word-Program concurrently. All
flash memory Erase and Program operations will automati-
cally latch the input address and data signals and complete
the operation in background without further input stimulus
requirement. Once the internally controlled Erase or Pro-
gram cycle in the flash bank has commenced, the SRAM
bank can be accessed for Read or Write.
Multi-Purpose Flash (MPF) + SRAM ComboMemory
SST32HF202 / SST32HF402 / SST32HF802
SST32HF202 / 402 / 8022Mb Flash + 2Mb SRAM, 4Mb Flash + 2Mb SRAM, 8Mb Flash + 2Mb SRAM
(x16) MCP ComboMemory


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