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SST39VF010-70-4C-WH 데이터시트(PDF) 3 Page - Silicon Storage Technology, Inc

부품명 SST39VF010-70-4C-WH
상세설명  512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit (x8) Multi-Purpose Flash
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제조업체  SST [Silicon Storage Technology, Inc]
홈페이지  http://www.sst.com/
Logo SST - Silicon Storage Technology, Inc

SST39VF010-70-4C-WH 데이터시트(HTML) 3 Page - Silicon Storage Technology, Inc

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Data Sheet
512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash
SST39LF512 / SST39LF010 / SST39LF020 / SST39LF040
SST39VF512 / SST39VF010 / SST39VF020 / SST39VF040
3
©2005 Silicon Storage Technology, Inc.
S71150-09-000
1/06
Data# Polling (DQ7)
When the SST39LF512/010/020/040 and SST39VF512/
010/020/040 are in the internal Program operation, any
attempt to read DQ7 will produce the complement of the
true data. Once the Program operation is completed, DQ7
will produce true data. Note that even though DQ7 may
have valid data immediately following completion of an
internal Write operation, the remaining data outputs may
still be invalid: valid data on the entire data bus will appear
in subsequent successive Read cycles after an interval of 1
µs. During internal Erase operation, any attempt to read
DQ7 will produce a “0”. Once the internal Erase operation is
completed, DQ7 will produce a “1”. The Data# Polling is
valid after the rising edge of fourth WE# (or CE#) pulse for
Program operation. For Sector- or Chip-Erase, the Data#
Polling is valid after the rising edge of sixth WE# (or CE#)
pulse. See Figure 8 for Data# Polling timing diagram and
Figure 17 for a flowchart.
Toggle Bit (DQ6)
During the internal Program or Erase operation, any con-
secutive attempts to read DQ6 will produce alternating ‘0’s
and ‘1’s, i.e., toggling between 0 and 1. When the internal
Program or Erase operation is completed, the toggling will
stop. The device is then ready for the next operation. The
Toggle Bit is valid after the rising edge of fourth WE# (or
CE#) pulse for Program operation. For Sector- or Chip-
Erase, the Toggle Bit is valid after the rising edge of sixth
WE# (or CE#) pulse. See Figure 9 for Toggle Bit timing dia-
gram and Figure 17 for a flowchart.
Data Protection
The SST39LF512/010/020/040 and SST39VF512/010/
020/040 provide both hardware and software features to
protect nonvolatile data from inadvertent writes.
Hardware Data Protection
Noise/Glitch Protection: A WE# or CE# pulse of less than 5
ns will not initiate a Write cycle.
VDD Power Up/Down Detection: The Write operation is
inhibited when VDD is less than 1.5V.
Write Inhibit Mode: Forcing OE# low, CE# high, or WE#
high will inhibit the Write operation. This prevents inadvert-
ent writes during power-up or power-down.
Software Data Protection (SDP)
The SST39LF512/010/020/040 and SST39VF512/010/
020/040 provide the JEDEC approved Software Data Pro-
tection scheme for all data alteration operation, i.e., Pro-
gram and Erase. Any Program operation requires the
inclusion of a series of three-byte sequence. The three-byte
load sequence is used to initiate the Program operation,
providing optimal protection from inadvertent Write opera-
tions, e.g., during the system power-up or power-down.
Any Erase operation requires the inclusion of six-byte load
sequence. These devices are shipped with the Software
Data Protection permanently enabled. See Table 4 for the
specific software command codes. During SDP command
sequence, invalid commands will abort the device to read
mode, within TRC.
Product Identification
The Product Identification mode identifies the devices as
the SST39LF/VF512, SST39LF/VF010, SST39LF/VF020
and SST39LF/VF040 and manufacturer as SST. This
mode may be accessed by software operations. Users
may use the Software Product Identification operation to
identify the part (i.e., using the device ID) when using multi-
ple manufacturers in the same socket. For details, see
Table 4 for software operation, Figure 12 for the Software
ID Entry and Read timing diagram, and Figure 18 for the
Software ID entry command sequence flowchart.
Product Identification Mode Exit/Reset
In order to return to the standard Read mode, the Software
Product Identification mode must be exited. Exit is accom-
plished by issuing the Software ID Exit command
sequence, which returns the device to the Read operation.
Please note that the Software ID Exit command is ignored
during an internal Program or Erase operation. See Table 4
for software command codes, Figure 13 for timing wave-
form, and Figure 18 for a flowchart.
TABLE
1: PRODUCT IDENTIFICATION
Address
Data
Manufacturer’s ID
0000H
BFH
Device ID
SST39LF/VF512
0001H
D4H
SST39LF/VF010
0001H
D5H
SST39LF/VF020
0001H
D6H
SST39LF/VF040
0001H
D7H
T1.1 1150


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