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TDA4663T 데이터시트(PDF) 6 Page - NXP Semiconductors |
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TDA4663T 데이터시트(HTML) 6 Page - NXP Semiconductors |
6 / 12 page 1996 Nov 22 6 Philips Semiconductors Product specification Baseband delay line TDA4663T Notes 1. Noise voltage at f = 10 kHz to 1 MHz; RS < 300 Ω. 2. The leading edge of the burst-key pulse or H-blanking pulse is used for timing. αct(16, 11) crosstalk direct from input to output signal V14 =0V; RS = 300 Ω; V16 = 1.35 V (p-p) 30 −− dB SVRR supply voltage ripple rejection ∆V11, 12/VR VR = 100 mV (p-p); fR = 10 Hz to 1 kHz; V11, 12 = 1.35 V (p-p) 34 −− dB V11, 12(p-p) clamping offset during H-clamp (peak-to-peak value) V14 =V16 =0V; RS = 300 Ω −− 5mV V11, 12(p-p) unwanted signals (line-locked) (peak-to-peak value) V14 =V16 =0V; active video; RS = 300 Ω residual clock (3 MHz) −− 6.25 mV meander −− 1.5 mV needles −− 2.5 mV td line delay time for PAL signals 64 − 0.125 64 − 0.055 64 + 0.015 µs for NTSC signals 63.555 − 0.125 63.555 − 0.055 63.555 + 0.015 µs Sandcastle pulse input (pin 5) fBK burst-key frequency/sandcastle frequency 14.2 15.625 17.0 kHz V5 top pulse voltage note 2 4.0 − VP + 1.0 V tBK top pulse duration − 2.5 −µs Vslice internal slicing level V5 − 1.0 − V5 − 0.5 V Ii input current −− 10 µA Ci input capacitance −− 10 pF tli lock-in time for PLL −− 1ms Clamping pulse input (pin 7) Vclamp clamping pulse ON 3.5 VP − 0.1 VP V clamping pulse OFF −0.5 +0.1 +1.5 V Ii input current −− 10 µA Ci input capacitance −− 10 pF tclamp clamping pulse duration 0.1 2 3 µs tr rise time 10 −− ns tf fall time 10 −− ns SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT |
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