전자부품 데이터시트 검색엔진 |
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E7520 데이터시트(PDF) 3 Page - Intel Corporation |
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E7520 데이터시트(HTML) 3 Page - Intel Corporation |
3 / 4 page Features Benefits Supports two Intel® XeonTM processors Optimized performance for multiple dual-processor market segments and price points, or two Low Voltage Intel® XeonTM supporting a larger number of users/transactions with faster response times processors over an 800 MHz system bus for dual-processing platforms 800 MHz system bus capability Increased platform bus bandwidth (50% more than 533 MHz) delivers increased system performance PCI Express*1 Direct connection between the MCH and PCI Express component/adapters; bandwidth up to 4 GB/second on each x8 PCI Express interface; higher bandwidth and less I/O bottlenecks than PCI-X* DDR2-400 memory interface I Maximum memory bandwidth of 6.4 GB/second I Decreased power consumption – especially important on dense rack, Hot Plug Controller (HPC) and blade configurations Intel® 6700PXH 64-bit PCI Hub (Optional) I Next-generation PCI/PCI-X performance and significant enhancements to platform flexibility I Supports two independent 64-bit,133 MHz PCI-X segments and two hot-plug controllers (one per segment) Intel® Hub Interface 1.5 connection Point-to-point connection between the MCH and the Intel® 6300ESB I/O Controller Hub to the MCH provides 266 MB/second of bandwidth Advanced Platform RAS I Features such as memory ECC, Intel® x4 Single Device Data Correction2 (x4 SDDC), DIMM sparring, DIMM scrubbing and memory mirroring can improve system reliability I 32-bit Cyclic Redundancy Check (CRC) on PCI Express I Hot swap PCI Express enhances serviceability I SMBus port hooks into Intel® E7520 chipset for remote management operation and support for variety of third-party Base Management Controller (BMC) and BIOS solutions Product Product Code Package Intel® E7520 Memory Controller NQE7520MC 1077 Flip Chip-Ball Grid Array (FC-BGA) Hub (MCH) Intel® 6700PXH 64-bit PCI Hub RG82870P2 567 Flip Chip-Ball Grid Array (FC-BGA) Intel® 6300ESB I/O Controller Hub FWE6300ESB 689 Plastic Ball Grid Array (PBGA) 1 PCI Express* reduced power-state L0s not supported. 2 In an x4 DDR memory device, the Intel® x4 Single Device Data Correction (x4 SDDC), provides error detection and correction for 1 to 4 data bit within a single device and provides error detection for up to 8 data bits within two devices. † Dual Low Voltage Intel® Xeon™ Processors are also supported. ∆ Intel® EM64T requires a computer system with a processor, chipset, BIOS, operating system, device drivers and applications enabled for Intel EM64T. Processor will not operate (including 32-bit operation) without an Intel EM64T-enabled BIOS. Performance will vary depending on your hardware and software configurations. See http://www.intel.com/info/em64t for more information including details on which processors support Intel EM64T or consult with your system vendor for more information. § Hyper-Threading Technology requires a computer system with an Intel® Pentium® 4 processor supporting Hyper-Threading Technology and an HT Technology enabled chipset, BIOS and operating system. Performance will vary depending on the specific hardware and software you use. See http://www.intel.com/info/hyperthreading/ for more information including details on which processors support HT Technology. |
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