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74LVC594APW 데이터시트(PDF) 11 Page - NXP Semiconductors |
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11 / 19 page 74LVC594A_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 24 May 2007 11 of 19 NXP Semiconductors 74LVC594A 8-bit shift register with output register Measurement points are given in Table 8. The shaded areas indicate when the input is permitted to change for predictable output performance. VOL and VOH are typical output voltage drops that occur with the output load. Fig 9. The data set-up and hold times for the serial data input (DS) mna560 GND GND th tsu th tsu VM VM VM VI VOH VOL VI Q 7S output SH CP input D S input Measurement points are given in Table 8. VOL and VOH are typical output voltage drops that occur with the output load. Fig 10. The shift reset (SHR) to storage clock (STCP) set-up times mbc326 VM tsu VM VM STCP input Q n outputs SHR input |
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