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TDA9150B 데이터시트(PDF) 10 Page - NXP Semiconductors

부품명 TDA9150B
상세설명  Programmable deflection controller
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제조업체  PHILIPS [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

TDA9150B 데이터시트(HTML) 10 Page - NXP Semiconductors

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July 1994
10
Philips Semiconductors
Preliminary specification
Programmable deflection controller
TDA9150B
Horizontal part (pins 1, 2, 13, 19 and 20)
SYNCHRONIZATION PULSE
The HA input (pin 13) is a TTL-compatible CMOS input.
Pulses on this input have to fulfil the timing requirements
as illustrated in Fig.6. For correct detection the minimum
pulse width for both the HIGH and LOW periods is 2
internal clock periods.
FLYBACK INPUT PULSE
The HFB input (pin 1) is a CMOS input. The delay of the
centre of the flyback pulse to the leading edge of the HA
pulse can be set via the I2C-bus with the horizontal phase
byte (subaddress 08), as illustrated in Fig.7. The
resolution is 6-bit.
OUTPUT PULSE
The HOUT pulse (pin 20) is an open-drain NMOS output.
The duty factor for this output is typically 52
48
(conducting/non-conducting) during normal operation. A
soft start causes the duty factor to increase linearly from 5
to 52% over a minimum period of 2000 lines in 2000 steps.
OFF-CENTRE SHIFT
The OFCS output (pin 19) is a push-pull CMOS output
which is driven by a pulse-width modulated DAC.
By using a suitable interface, the output signal can be used
for off-centre shift correction in the horizontal output stage.
This correction is required for HDTV tubes with a 16
× 9
aspect ratio and is useful for high performance flat square
tubes to obtain the required horizontal linearity. For
applications where off-centre correction is not required,
the output can be used as an auxiliary DAC. The OFCS
signal is phase-locked with the line frequency. The
off-centre shift can be set via the I2C-bus, subaddress 09,
with a 6-bit resolution as illustrated in Fig.8.
SANDCASTLE
The DSC input/output (pin 2) acts as a sandcastle
generating output and a guard sensing input. As an output
it provides 2 levels (apart from the base level), one for the
horizontal and vertical blanking and the other for the video
clamping. As an input it acts as a current sensor during the
vertical blanking interval for guard detection.
CLAMPING PULSE
The clamping pulse width is 21 internal clock periods. The
shift, with respect to HA can be varied from 35 to 49 clock
periods in 7 steps via the I2C-bus, clamp shift byte
subaddress 0A, as illustrated in Fig.9. It is possible to
suppress the clamping pulse during wait, stop and
protection modes with control bit CSU. This will avoid
unwanted reset of the TDA4680/81 (only used in those
circuits).
HORIZONTAL BLANKING
The start of the horizontal blanking pulse is minimum 38
and maximum 41 clock periods before the centre of the
flyback pulse, depending on the fclk/fH ratio K in
accordance with 41
− (432 − K).
Stop of the horizontal blanking pulse is determined by the
trailing edge of the HFB pulse at the horizontal blanking
slicing level crossing as illustrated in Fig.10.
VERTICAL BLANKING
The vertical blanking pulse starts two internal clock pulses
after the rising edge of the VA pulse. During this interval a
small guard pulse, generated during flyback by the vertical
power output stage, must be inserted. Stop vertical
blanking is effected at the end of the blanking interval only
when the guard pulse is present (see Section “Vertical
guard”).
The start scan setting determines the end of vertical
blanking with a 6-bit resolution in steps of one line via the
I2C-bus subaddress 02 (see Figs 11 and 12).
VERTICAL GUARD
In the vertical blanking interval a small unblanking pulse is
inserted. This pulse must be filled-in by a blanking pulse or
guard pulse from the vertical power output stage which
was generated during the flyback period. In this condition
the sandcastle output acts as guard detection input and
requires a minimum 800
µA input current. This current is
sensed during the unblanking period. Vertical blanking is
only stopped at the end of the blanking interval when the
inserted pulse is present. In this way the picture tube is
protected against damage in the event of missing or
malfunctioning vertical deflection (see Figs 11 and 12).


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