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RJK5015DPK

 Silicon N Channel MOS FET High Speed Power Switching ( 7 Page)


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RJK5015DPK
REJ03G1360-0200 Rev.2.00 Apr 18, 2007
Page 3 of 6
Main Characteristics
400
300
200
100
0
50
100
150
200
50
40
30
20
10
0
4
8
12
16
20
Case Temperature Tc (
°C)
Power vs. Temperature Derating
Drain to Source Voltage VDS (V)
Typical Output Characteristics
Pulse Test
Gate to Source Voltage VGS (V)
Typical Transfer Characteristics
6 V
1
30
100
3
10
300
1000
0.2
0.1
0.05
1
0.5
0.02
0.01
Drain Current ID (A)
Static Drain to Source on State Resistance
vs. Drain Current
VGS = 10 V
Pulse Test
5.4 V
6.2 V
6.4 V
5.6 V
5.8 V
100
10
110
1000
0.1
1
1000
Drain to Source Voltage VDS (V)
Maximum Safe Operation Area
100
VGS = 5.2 V
0.5
0.4
0.3
0.2
0.1
−25
0
25
50
75
100 125
150
0
Case Temperature Tc (
°C)
Static Drain to Source on State Resistance
vs. Temperature
VGS = 10 V
Pulse Test
02
46
8
10
20
50
10
1
2
5
0.2
0.5
0.1
100
VDS = 10 V
Pulse Test
Tc = 75
°C
25
°C
−25°C
8 V, 9 V
ID = 25 A
0.01
0.1
5 A
Ta = 25
°C
10
µs
100
µs
1 ms
Operation in this
area is limited by
R
DS(on)
PW = 10 ms
(1shot)
DC Operation
(Tc = 25
°C)
10 V
12.5 A
1  2  3  4  5  6  7 



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