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BQ24751A 데이터시트(PDF) 5 Page - Texas Instruments

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부품명 BQ24751A
상세설명  Host-controlled Multi-Chemistry Battery Charger With System Power Selector, AC Over-Power Protection, Programmable OVP and Low Iq
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제조업체  TI [Texas Instruments]
홈페이지  http://www.ti.com
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ABSOLUTE MAXIMUM RATINGS
bq24751A
SLUS756 – SEPTEMBER 2007
Table 1. TERMINAL FUNCTIONS – 28-PIN QFN (continued)
TERMINAL
DESCRIPTION
NAME
NO.
Charge current sense resistor, negative input. An optional 0.1-
μF ceramic capacitor is placed from SRN pin to AGND
SRN
18
for common-mode filtering. An optional 0.1-
μF ceramic capacitor is placed from SRN to SRP to provide
differential-mode filtering.
SRP
19
Charge current sense resistor, positive input. (See comments for SRN.)
CELLS
20
2, 3 or 4 cells selection logic input. Logic low programs 3 cell. Logic high programs 4 cell. Floating programs 2 cell.
Learn mode logic input control pin — logic high to override system selector when adapter is present, the battery is
discharged to recalibrate the battery-pack gas gauge. When adapter is present and LEARN is high, battery charging is
disabled, the adapter is disconnected (ACDRV is off), and the battery is connected to system (BATDRV is on). Ssytem
LEARN
21
selector automatically switches to adapter if battery is discharged below LOWBAT (3 V). When adapter is present and
LEARN is low, the adapter is connected to system in normal selector logic (ACDRV is on and BATDRV is off), allowing
battery charging. If adapter is not present, the battery is always connected to the system (ACDRV is off and BATDRV
is on).
Power ground. On PCB layout, connect directly to source of low-side power MOSFET, to ground connection of input
PGND
22
and output capacitors of the charger. Only connect to AGND through the power pad underneath the IC.
LODRV
23
PWM low side driver output. Connect to the gate of the low-side power MOSFET with a short trace.
PWM low side driver positive 6-V supply output. Connect a 1-
μF ceramic capacitor from REGN to PGND, close to the
REGN
24
IC. Use for high-side driver bootstrap voltage by connecting a small-signal Schottky diode from REGN to BTST.
PWM high side driver negative supply. Connect to the phase switching node (junction of the low-side power MOSFET
PH
25
drain, high-side power MOSFET source, and output inductor). Connect the 0.1-
μF bootstrap capacitor from from PH to
BTST.
HIDRV
26
PWM high side driver output. Connect to the gate of the high-side power MOSFET with a short trace.
PWM high side driver positive supply. Connect a 0.1-
μF bootstrap ceramic capacitor from BTST to PH. Connect a
BTST
27
small bootstrap Schottky diode from REGN to BTST.
IC power positive supply. Connect to the common-source (diode-OR) point: source of high-side P-channel MOSFET
PVCC
28
and source of reverse-blocking power P-channel MOSFET. Place a 1-
μF ceramic capacitor from PVCC to PGND pin
close to the IC.
over operating free-air temperature range (unless otherwise noted)
(1) (2)
VALUE
UNIT
PVCC, ACP, ACN, SRP, SRN, BAT, BATDRV, ACDRV
–0.3 to 30
PH
–1 to 30
REGN, LODRV, VREF, VDAC, VADJ, ACSET, SRSET, ACDET, ACOP,
–0.3 to 7
Voltage range
CHGEN, CELLS, STAT, ACGOOD, LEARN, OVPSET
V
VREF, IADAPT
–0.3 to 3.6
BTST, HIDRV with respect to AGND and PGND
–0.3 to 36
Maximum difference voltage
ACP–ACN, SRP–SRN, AGND–PGND
–0.5 to 0.5
Junction temperature range
–40 to 155
°C
Storage temperature range
–55 to 155
°C
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
All voltages are with respect to GND if not specified. Currents are positive into, negative out of the specified terminal. Consult Packaging
Section of the data book for thermal limitations and considerations of packages.
Copyright © 2007, Texas Instruments Incorporated
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