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CS4349-DZZR 데이터시트(PDF) 6 Page - Cirrus Logic |
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CS4349-DZZR 데이터시트(HTML) 6 Page - Cirrus Logic |
6 / 40 page 6 DS782F1 CS4349 1. PIN DESCRIPTION Pin Name # Pin Description VLC 5 Control Interface Power (Input) - Positive power for the hardware/software control interface VD_FILT 6 Regulator Voltage (Output) - Filter connection for internal voltage regulator GND 7, 19 Ground (Input) - Ground reference VLS 9 Serial Audio Interface Power (Input) - Positive power for the serial audio interface SCLK 10 Serial Clock (Input) - Serial bit-clock for the serial audio interface SDIN 11 Serial Audio Data Input (Input) - Input for two’s complement serial audio data LRCK 12 Left/Right Clock (Input) - Determines which channel, Left or Right, is currently active on the serial audio data line TSTO 13 Test Output (Output) - This pin needs to be floating and not connected to any trace or plane. TSTO 14 23 Test Output (Output) - These pins need to be floating and not connected to any trace or plane. AOUTA AOUTB 15 22 Analog Outputs (Output) - The full-scale output level is specified in “DAC Analog Characteristics - Commercial (-CZZ)” on page 9. AMUTEC BMUTEC 16 21 Mute Control (Output) - Control signals for optional mute circuit VBIAS 17 Positive Voltage Reference (Output) - Positive reference voltage for the internal DAC VA 18 Analog Power (Input) - Positive power supply for the analog section VQ 20 Quiescent Voltage (Output) - Filter connection for internal quiescent voltage RST 24 Reset (Input) - When pulled low, device will power down and reset all internal registers to their default settings. DIF2(AD1/CDOUT) RST DEM(AD0/CS)TSTO DIF0(SDA/CDIN) AOUTB DIF1(SCL/CCLK) BMUTEC VLC VQ VD_FILT GND GND VA POPGUARD(TSTO) VBIAS VLS AMUTEC SCLK AOUTA SDIN TSTO LRCK TSTO 2 3 4 5 6 7 8 17 18 19 20 21 22 23 9 10 11 12 13 14 15 16 24 1 |
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