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SM65MLVD082DGGR 데이터시트(PDF) 11 Page - Texas Instruments |
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SM65MLVD082DGGR 데이터시트(HTML) 11 Page - Texas Instruments |
11 / 28 page www.ti.com 15 pF tpZL tpLZ VOL VOL +0.5 V VO RL 499 Ω _ + VTEST B A RE 1.2 V Inputs VCC 1 V VCC VCC/2 0 V VCC VCC/2 VTEST A RE VO 0 V 1.4 V A tpZH tpHZ 0 V VOH -0.5 V VCC VCC/2 0 V VOH VCC/2 RE VO VTEST CL SN65MLVD080 SN65MLVD082 SLLS581B – SEPTEMBER 2003 – REVISED SEPTEMBER 2005 A. All input pulses are supplied by a generator having the following characteristics: tr or tf≤ 1 ns, frequency = 1 MHz, duty cycle = 50 ± 5%. B. RL is 1% tolerance, metal film, surface mount, and located within 2 cm of the D.U.T. C. CL is the instrumentation and fixture capacitance within 2 cm of the DUT and ±20%. The measurement is made on test equipment with a -3 dB bandwidth of at least 1 GHz. Figure 11. Receiver Enable/Disable Time Test Circuit and Waveforms 11 Submit Documentation Feedback |
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