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ML144111 데이터시트(PDF) 3 Page - LANSDALE Semiconductor Inc. |
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ML144111 데이터시트(HTML) 3 Page - LANSDALE Semiconductor Inc. |
3 / 8 page www.lansdale.com Page 3 of 8 LANSDALE Semiconductor, Inc. ML144110, ML144111 MAXIMUM RATINGS* (Voltages referenced to VSS) Parameter Symbol Value Unit DC Supply Voltage VDD – 0.5 to + 18 V Input Voltage, All Inputs Vin – 0.5 to VDD + 0.5 V DC Input Current, per Pin I ± 10 mA Power Dissipation (Per Output) TA = 70°C, MC144110 MC144111 TA = 85°C, MC144110 MC144111 POH 30 50 10 20 mW Power Dissipation (Per Package) TA = 70°C, MC144110 MC144111 TA = 85°C, MC144110 MC144111 PD 100 150 25 50 mW Storage Temperature Range Tstg – 65 to + 150 °C * Maximum Ratings are those values beyond which damage to the device may occur. ELECTRICAL CHARACTERISTICS (Voltages referenced to VSS, TA = 0 to 85°C unless otherwise indicated) Symbol Parameter Test Conditions VDD Min Max Unit VIH High–Level Input Voltage (Din, ENB, CLK) 5 10 15 3.0 3.5 4 — — — V VIL Low–Level Input Voltage (Din, ENB, CLK) 5 10 15 — — — 0.8 0.8 0.8 V IOH High–Level Output Current (Dout) Vout = VDD – 0.5 V 5 – 200 — µA IOL Low–Level Output Current (Dout) Vout = 0.5 V 5 200 — µA IDD Quiescent Supply Current ML144110 ML144111 Iout = 0 µA 15 15 — — 12 8 mA Iin Input Leakage Current (Din, ENB, CLK) Vin = VDD or 0 V 15 — ± 1 µA Vnonl Nonlinearity Voltage (Rn Out) See Figure 1 5 10 15 — — — 100 200 300 mV Vstep Step Size (Rn Out) See Figure 2 5 10 15 19 39 58 137 274 411 mV Voffset Offset Voltage from VSS Din = $00, See Figure 1 — — 1 LSB IE Emitter Leakage Current VRn Out = 0 V 15 — 10 µA hFE DC Current Gain IE = 0.1 to 10.0 mA TA = 25°C — 40 — — VBE Base–to–Emitter Voltage Drop IE = 1.0 mA — 0.4 0.7 V This device contains protection circuitry to guard against damage due to high static voltages or electric fields; however, it is ad- vised that precautions be taken to avoid application of voltage higher than maximum rated voltages to this high–impedance circuit. For proper operation it is recommended that Vin and Vout be constrained to the range VSS ≤ (Vin or Vout) ≤VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Issue A |
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