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74ACT11802DWR 데이터시트(PDF) 1 Page - Texas Instruments

부품명 74ACT11802DWR
상세설명  TRIPLE 4-INPUT OR/NOR GATE
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74ACT11802DWR 데이터시트(HTML) 1 Page - Texas Instruments

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74ACT11802
TRIPLE 4-INPUT OR/NOR GATE
SCAS153A – D3594, JULY 1990 – REVISED APRIL 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Copyright
© 1993, Texas Instruments Incorporated
2–1
Inputs Are TTL-Voltage Compatible
Flow-Through Architecture Optimizes
PCB Layout
Center-Pin V
CC and GND Configurations
Minimize High-Speed Switching Noise
EPIC ™ (Enhanced-Performance Implanted
CMOS) 1-
µm Process
500-mA Typical Latch-Up Immunity
at 125
°C
Package Options Include Plastic
Small-Outline Packages and Standard
Plastic 300-mil DIPs
description
The 74ACT11802 contains three independent 4-input OR/NOR gates. They perform the Boolean functions in
positive logic Y = A + B + C + D and Z = A + B + C + D.
The 74ACT11802 is characterized for operation from – 40
°C to 85°C.
FUNCTION TABLE
(each 4-input gate)
INPUTS
OUTPUTS
A
B
C
D
Y
Z
H
X
X
X
H
L
X
HX
X
H
L
X
XHX
H
L
X
XX
H
H
L
L
L
L
L
L
H
logic symbol
logic diagram, each section (positive logic)
Z
1
1A
24
1B
23
1C
22
1D
1Y
2
1Z
3
21
2A
20
2B
17
2C
16
2D
2Y
4
2Z
9
15
3A
14
3B
13
3C
12
3D
3Y
10
3Z
11
≥ 1
A
Y
B
C
D
† This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
EPIC is a trademark of Texas Instruments Incorporated.
1
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3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
1A
1Y
1Z
2Y
GND
GND
GND
GND
2Z
3Y
3Z
3D
1B
1C
1D
2A
2B
VCC
VCC
2C
2D
3A
3B
3C
DW OR NT PACKAGE
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