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P312XDP512J1VALR 데이터시트(PDF) 67 Page - Freescale Semiconductor, Inc |
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P312XDP512J1VALR 데이터시트(HTML) 67 Page - Freescale Semiconductor, Inc |
67 / 1350 page Chapter 1 Device Overview MC9S12XD-Family MC9S12XDP512 Data Sheet, Rev. 2.17 Freescale Semiconductor 67 Table 1-8. MC9S12XD Family Power and Ground Connection Summary Mnemonic Pin Number Nominal Voltage Description 144-Pin LQFP 112-Pin LQFP 80-Pin QFP VDD1, 2 15, 87 13, 65 9, 49 2.5 V Internal power and ground generated by internal regulator VSS1, 2 16, 88 14, 66 10, 50 0V VDDR1 53 41 29 5.0 V External power and ground, supply to pin drivers and internal voltage regulator VSSR1 52 40 28 0 V VDDX1 139 107 77 5.0 V External power and ground, supply to pin drivers VSSX1 138 106 76 0 V VDDX2 26 N.A. N.A. 5.0 V External power and ground, supply to pin drivers VSSX2 27 N.A. N.A. 0 V VDDR2 82 N.A. N.A. 5.0 V External power and ground, supply to pin drivers VSSR2 81 N.A. N.A. 0 V VDDA 107 83 59 5.0 V Operating voltage and ground for the analog-to-digital converters and the reference for the internal voltage regulator, allows the supply voltage to the A/D to be bypassed independently. VSSA 110 86 62 0 V VRL 109 85 61 0 V Reference voltages for the analog-to-digital converter. VRH 108 84 60 5.0 V VDDPLL 55 43 31 2.5 V Provides operating voltage and ground for the phased-locked loop. This allows the supply voltage to the PLL to be bypassed independently. Internal power and ground generated by internal regulator. VSSPLL 57 45 33 0 V |
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