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74LVC3G14GM 데이터시트(PDF) 8 Page - NXP Semiconductors

부품명 74LVC3G14GM
상세설명  Triple inverting Schmitt trigger with 5 V tolerant input
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제조업체  NXP [NXP Semiconductors]
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74LVC3G14_5
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 05 — 5 October 2007
8 of 17
NXP Semiconductors
74LVC3G14
Triple inverting Schmitt trigger with 5 V tolerant input
13. Waveforms
Measurement points are given in Table 10. VOL and VOH are typical output voltage levels that occur with the output load.
Fig 7.
The data input (nA) to output (nY) propagation delays
mna344
tPHL
tPLH
VM
VM
VM
VM
nA input
nY output
GND
VI
VOH
VOL
Table 10.
Measurement points
VCC
Input VM
Output VM
1.65 V to 1.95 V
0.5
× VCC
0.5
× VCC
2.3 V to 2.7 V
0.5
× VCC
0.5
× VCC
2.7 V
1.5 V
1.5 V
3.0 V to 3.6 V
1.5 V
1.5 V
4.5 V to 5.5 V
0.5
× VCC
0.5
× VCC
Test data is given in Table 11. Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 8.
Load circuitry for switching times
VEXT
VCC
VI
VO
mna616
DUT
CL
RT
RL
RL
G
Table 11.
Test data
Supply voltage
Input
Load
VEXT
VCC
VI
tr =tf
CL
RL
tPLH, tPHL
1.65 V to 1.95 V
VCC
≤ 2.0 ns
30 pF
1 k
open
2.3 V to 2.7 V
VCC
≤ 2.0 ns
30 pF
500
open
2.7 V
2.7 V
≤ 2.5 ns
50 pF
500
open
3.0 V to 3.6 V
2.7 V
≤ 2.5 ns
50 pF
500
open
4.5 V to 5.5 V
VCC
≤ 2.5 ns
50 pF
500
open


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