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TPCP8505 데이터시트(PDF) 2 Page - Toshiba Semiconductor |
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TPCP8505 데이터시트(HTML) 2 Page - Toshiba Semiconductor |
2 / 5 page TPCP8505 2006-11-13 2 Figure 1. Circuit Configuration (top view) Figure 2. Marking (Note 4) Note 4: ● on the lower left of the marking indicates Pin 1. * Weekly code (three digits): Electrical Characteristics (Ta = 25°C) Characteristic Symbol Test Condition Min Typ. Max Unit Collector cut-off current ICBO VCB = 100 V, IE = 0 ⎯ ⎯ 100 nA Emitter cut-off current IEBO VEB = 7 V, IC = 0 ⎯ ⎯ 100 nA Collector-base breakdown voltage V (BR) CBO IC = 1 mA, IB = 0 100 ⎯ ⎯ V Collector-emitter breakdown voltage V (BR) CEO IC = 10 mA, IB = 0 50 ⎯ ⎯ V hFE (1) VCE = 2 V, IC = 0.3 A 400 ⎯ 1000 DC current gain hFE (2) VCE = 2 V, IC = 1.0 A 200 ⎯ ⎯ Collector-emitter saturation voltage VCE (sat) IC = 1 A, IB = 20 mA ⎯ ⎯ 0.14 V Base-emitter saturation voltage VBE (sat) IC = 1 A, IB = 20 mA ⎯ ⎯ 1.1 V Rise time tr ⎯ 40 ⎯ Storage time tstg ⎯ 500 ⎯ Switching time Fall time tf See Figure 3 circuit diagram VCC ∼− 30 V, RL = 30 Ω IB1 = −IB2 = 33 mA ⎯ 120 ⎯ ns Figure 3. Switching Time Test Circuit & Timing Chart IB1 IB2 Input Output RL VCC IB1 20 μs IB2 Duty cycle <1% 1 2 3 4 8 7 6 5 Lot No. (weekly code) 8 7 6 5 Type * 8505 1 2 3 4 Week of manufacture (01 for the first week of the year, continuing up to 52 or 53) Year of manufacture (lowest-order digit of the calendar year) |
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