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SI3460-EVB 데이터시트(PDF) 4 Page - Silicon Laboratories |
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SI3460-EVB 데이터시트(HTML) 4 Page - Silicon Laboratories |
4 / 22 page Si3460 4 Preliminary Rev. 0.4 2. Si3460-EVB Application Diagram Figure 2. Si3460-EVB Application Diagram 2.1. Si3460-EVB Performance Characteristics When implemented according to the recommended external components and layout guidelines for the Si3460- EVB, the Si3460 enables the following performance specifications in single-port PSE applications. Please refer to the Si3460-EVB User’s Guide and schematics for details. Table 1. Selected Electrical Specifications (Si3460-EVB) Parameter Symbol Test Condition Min Typ Max Unit Power Supplies VIN input supply range VIN –40 to +85 °C ambient range 11 12, 15 16 V VIN input UVLO voltage UVLO UVLO turn-off voltage at VIN 10 — — V VDD supply voltage range VDD Si3460 supply voltage range 2.7 3.3 3.6 V VDD UVLO voltage VDDmin Si3460 UVLO turn-off voltage 2.7 — — V Output supply voltage VOUT PSE output voltage at VIN = 11 V (min) to 16 V (max) –54 –50 –46 V Supply current IIN Current into VDD (including gate drive and detect) —5— mA Detection Specifications Minimum signature resistance RDETmin 15 17 19 k Ω Maximum signature resistance RDETmax 26.5 29 33 k Ω Classification Specifications Classification voltage VCLASS 0mA < ICLASS < 45 mA –20.5 — –15.5 V Classification current limit ICLASS Measured with 200 Ω across VOUT 55 — 95 mA Classification current region ICLASS_REGION Class 0 0 — 5 mA Class 1 8 — 13 mA Class 2 16 — 21 mA Class 3 25 — 31 mA Class 4 35 — 45 mA Si3460 GND DETA VIN +11V to 16V VOUT -48 V PSE output (to port magnetics) RST VDD PWM BOM Detect BOM ISENSE VEE STATUS 250KHZ CTRL1 GATE VSENSE DETECT FAULT PGOOD CTRL2 Note: Refer to the Si3460-EVB User Guide for complete schematic details |
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