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TA1384FNG 데이터시트(PDF) 8 Page - Toshiba Semiconductor |
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TA1384FNG 데이터시트(HTML) 8 Page - Toshiba Semiconductor |
8 / 22 page TA1384FNG 2004/11/24 8 PLL / Band Block (Unless otherwise specified, Vcc = 5 V, Ta = 25℃) CHARACTERISTICS SYMBOL TEST CIRCUIT TEST CONDITION MIN. TYP. MAX. UNIT IBD-1 Pin 4, maximum drive current - - 7 IBD-2 Pin 5, maximum drive current - - 10 IBD-3 Pin 6, maximum drive current - - 3 Band Port Drive Current IBD-4 1 Pin 7, maximum drive current 7 mA Band Port Drive Maximum Current IBDmax 1 Maximum drive current / 2 port ON - - 17 mA Band Port Drive Voltage Drop VBDsat 1 With each port at maximum current drive. 1 port ON - 0.15 0.2 V Tuning Amplifier Output Voltage (Close Loop) Vt out 3 Isink = 1.5 mA 0.3 - 33 V Tuning Amplifier Maximum Current Ivt 3 VBT = 33 V - - 1.5 mA Crystal Negative Resistance XtR 1 4-MHz crystal used 1 2 - kΩ Crystal Operating Range Xo fin 1 - - 4 - MHz Crystal External Input Level Xo extl 2 Ref. freq. = 4 MHz input - 400 - mVp-p Ratio Setting Range N - 15-bit counter 1024 - 32767 Ratio Logic Input Low Voltage VBsL 1 SDA, SCL pin -0.3 - 1.5 V Logic Input High Voltage VBsH 1 SDA, SCL pin 2.7 - Vcc +0.3 V Logic Input Current (Low) I BsL 1 SDA, SCL pin -20 - 10 uA Logic Input Current (High) I BsH 1 SDA, SCL pin -10 - 20 uA CP = 0 ±40 ±55 ±70 Charge Pump Output Current Ichg 1 CP = 1 ±190 ±250 ±310 uA ACK Output Voltage VACK 1 ISINK = 3 mA - - 0.4 V The range of the crystal external input level (Xo extl) in the internal circuit configuration is 300 – 650 mVp-p (when a signal of 4 MHz is applied). |
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