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TC74VHC175F 데이터시트(PDF) 4 Page - Toshiba Semiconductor

부품명 TC74VHC175F
상세설명  Quad D-Type Flip Flop with Clear
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제조업체  TOSHIBA [Toshiba Semiconductor]
홈페이지  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TC74VHC175F 데이터시트(HTML) 4 Page - Toshiba Semiconductor

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TC74VHC175F/FN/FT/FK
2007-10-01
4
Electrical Characteristics
DC Characteristics
Test Condition
Ta = 25°C
Ta =
−40 to 85°C
Characteristics
Symbol
VCC
(V)
Min
Typ.
Max
Min
Max
Unit
High-level input
voltage
VIH
―
2.0
3.0
to
5.5
1.50
VCC ×
0.7
―
―
―
―
1.50
VCC ×
0.7
―
―
V
Low-level input
voltage
VIL
―
2.0
3.0
to
5.5
―
―
―
―
0.50
VCC ×
0.3
―
―
0.50
VCC ×
0.3
V
IOH = −50 μA
2.0
3.0
4.5
1.9
2.9
4.4
2.0
3.0
4.5
―
―
―
1.9
2.9
4.4
―
―
―
High-level output
voltage
VOH
VIN
= VIH or
VIL
IOH = −4 mA
IOH = −8 mA
3.0
4.5
2.58
3.94
―
―
―
―
2.48
3.80
―
―
V
IOL = 50 μA
2.0
3.0
4.5
―
―
―
0.0
0.0
0.0
0.1
0.1
0.1
―
―
―
0.1
0.1
0.1
Low-level output
voltage
VOL
VIN
= VIH or
VIL
IOL = 4 mA
IOL = 8 mA
3.0
4.5
―
―
―
―
0.36
0.36
―
―
0.44
0.44
V
Input leakage
current
IIN
VIN = 5.5 V or GND
0 to
5.5
―
―
±0.1
―
±1.0
μA
Quiescent supply
current
ICC
VIN = VCC or GND
5.5
―
―
4.0
―
40.0
μA
Timing Requirements (input: tr = tf = 3 ns)
Test Condition
Ta = 25°C
Ta =
−40 to
85°C
Characteristics
Symbol
VCC (V)
Typ.
Limit
Limit
Unit
Minimum pulse width
(CK)
tw (L)
tw (H)
―
3.3 ± 0.3
5.0 ± 0.5
―
―
5.0
5.0
5.0
5.0
ns
Minimum pulse width
( CLR )
tw (L)
―
3.3 ± 0.3
5.0 ± 0.5
―
―
5.0
5.0
5.0
5.0
ns
Minimum set-up time
ts
―
3.3 ± 0.3
5.0 ± 0.5
―
―
5.0
4.0
5.0
4.0
ns
Minimum hold time
th
―
3.3 ± 0.3
5.0 ± 0.5
―
―
1.0
1.0
1.0
1.0
ns
Minimum removal time
( CLR )
trem
―
3.3 ± 0.3
5.0 ± 0.5
―
―
5.0
5.0
5.0
5.0
ns


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