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74AHC00 데이터시트(PDF) 3 Page - NXP Semiconductors |
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74AHC00 데이터시트(HTML) 3 Page - NXP Semiconductors |
3 / 13 page 74AHC_AHCT00_3 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 — 8 January 2008 3 of 13 NXP Semiconductors 74AHC00; 74AHCT00 Quad 2-input NAND gate 6. Functional description [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care 7. Limiting values [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] Ptot derates linearly with 8 mW/K above 70 °C. [3] Ptot derates linearly with 5.5 mW/K above 60 °C. [4] Ptot derates linearly with 4.5 mW/K above 60 °C. 3Y 8 data output 3A 9 data input 3B 10 data input 4Y 11 data output 4A 12 data input 4B 13 data input VCC 14 supply voltage Table 2. Pin description …continued Symbol Pin Description Table 3. Function selection[1] Input Output nA nB nY LX H XL H HHL Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC supply voltage −0.5 +7.0 V VI input voltage −0.5 +7.0 V IIK input clamping current VI < −0.5 V [1] −20 - mA IOK output clamping current VO < −0.5 V or VO >VCC + 0.5 V [1] - ±20 mA IO output current VO = −0.5 V to (VCC + 0.5 V) - ±25 mA ICC supply current - 75 mA IGND ground current −75 - mA Tstg storage temperature −65 +150 °C Ptot total power dissipation Tamb = −40 °C to +125 °C SO14 package [2] - 500 mW TSSOP14 package [3] - 500 mW DHVQFN14 package [4] - 500 mW |
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