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GS1T70-D540 데이터시트(PDF) 3 Page - STMicroelectronics |
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GS1T70-D540 데이터시트(HTML) 3 Page - STMicroelectronics |
3 / 5 page 20 January 1997 50.8 (2.00) 21.59 (0.85) 19.05 (0.75) 18.0 (0.71) 50.8 (2.00) 1 2 3 4 5 6 5.08 (0.2) 5.08 (0.2) 10.16 (0.4) 10.16 (0.4) 7.62 (0.3) 1.27 (0.05) Bottom view 3.0 (1.18) O 1 (0.04) Package V. Dimensions in mm (inches). Figure 1. Connection diagram and mechanical data 3/5 Pin Description 1 Input (either polarity) 2 Input (either polarity) 3 +5V Output 4 Return for +5V Output 5 +40V Output 6 Return for +40 V Output GALVANIC INSULATION Galvanic insulation (3000 V for 60 s as specified in EN60950) is provided between the input and the output 1 (40 V output for the "S" interface). No insulation is provided between input and output 2 (+5 V for logics put on NT1 board). See figure 2. PIN DESCRIPTION out 1 5V out 2 40V INPUT Galvanic insulation barrier 3000 V RMS Figure 2. Galvanic insulation barrier GS1T70-D540/2 |
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