전자부품 데이터시트 검색엔진 |
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AD7999 데이터시트(PDF) 10 Page - Analog Devices |
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AD7999 데이터시트(HTML) 10 Page - Analog Devices |
10 / 28 page AD7991/AD7995/AD7999 Rev. 0 | Page 10 of 28 Limit at tMIN, tMAX Parameter Conditions Min Typ Max Unit Description t10 Standard mode 300 ns tFDA, fall time of the SDA signal Fast mode 20 + 0.1 CB 300 ns High speed mode CB = 100 pF maximum 10 80 ns CB = 400 pF maximum 20 160 ns t11 Standard mode 1000 ns tRCL, rise time of the SCL signal Fast mode 20 + 0.1 CB 300 ns High speed mode CB = 100 pF maximum 10 40 ns CB = 400 pF maximum 20 80 ns t11A Standard mode 1000 ns tRCL1, rise time of the SCL signal after a repeated start condition and after an acknowledge bit Fast mode 20 + 0.1 CB 300 ns High speed mode CB = 100 pF maximum 10 80 ns CB = 400 pF maximum 20 160 ns t12 Standard mode 300 ns tFCL, fall time of the SCL signal Fast mode 20 + 0.1 CB 300 ns High speed mode CB = 100 pF maximum 10 40 ns CB = 400 pF maximum 20 80 ns tSP1 Fast mode 0 50 ns Pulse width of the suppressed spike High speed mode 0 10 ns tPOWER-UP 0.6 μs Power-up and acquisition time 1 Functionality is tested during production. 2 A device must provide a data hold time for SDA in order to bridge the undefined region of the SCL falling edge. 3 For 3 V supplies, the maximum hold time with CB = 100 pF maximum is 100 ns maximum. t6 t7 t2 t11 t4 t1 t12 t10 t5 t9 t6 t3 t8 SCL S SDA S = START CONDITION P = STOP CONDITION P P S Figure 2. 2-Wire Serial Interface Timing Diagram |
유사한 부품 번호 - AD7999 |
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유사한 설명 - AD7999 |
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