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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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LM2700LDX-ADJ 데이터시트(PDF) 11 Page - National Semiconductor (TI) |
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LM2700LDX-ADJ 데이터시트(HTML) 11 Page - National Semiconductor (TI) |
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11 / 17 page  Operation (Continued) gin can also be improved by adding C C2 as discussed earlier in the section. The equation for A DC is given below with additional equations required for the calculation: mc ) 0.072fs (in V/s) where R L is the minimum load resistance, VIN is the mini- mum input voltage, g m is the error amplifier transconduc- tance found in the Electrical Characteristics table, and R D- SON is the value chosen from the graph "R DSON vs. VIN "in the Typical Performance Characteristics section. LAYOUT CONSIDERATIONS The LM2700 uses two separate ground connections, PGND for the driver and NMOS power device and AGND for the sensitive analog control circuitry. The AGND and PGND pins should be tied directly together at the package. The feed- back and compensation networks should be connected di- rectly to a dedicated analog ground plane and this ground plane must connect to the AGND pin. If no analog ground plane is available then the ground connections of the feed- back and compensation networks must tie directly to the AGND pin. Connecting these networks to the PGND can inject noise into the system and effect performance. The input bypass capacitor C IN, as shown in Figure 3, must be placed close to the IC. This will reduce copper trace resistance which effects input voltage ripple of the IC. For additional input voltage filtering, a 100nF bypass capacitor can be placed in parallel with C IN, close to the VIN pin, to shunt any high frequency noise to ground. The output ca- pacitor, C OUT, should also be placed close to the IC. Any copper trace connections for the C OUT capacitor can in- crease the series resistance, which directly effects output voltage ripple. The feedback network, resistors R FB1 and R FB2, should be kept close to the FB pin, and away from the inductor, to minimize copper trace connections that can in- ject noise into the system. Trace connections made to the inductor and schottky diode should be minimized to reduce power dissipation and increase overall efficiency. For more detail on switching power supply layout considerations see Application Note AN-1149: Layout Guidelines for Switching Power Supplies. Application Information 20012331 FIGURE 3. 600 kHz operation, 8V output www.national.com 11 |
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