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L6932D1.8 데이터시트(PDF) 7 Page - STMicroelectronics |
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L6932D1.8 데이터시트(HTML) 7 Page - STMicroelectronics |
7 / 11 page 7/11 L6932 Multilayer ceramic caps have the lowest ESR and can be required for particular applications. Nevertheless in several applications they are ok, the loop stability issue has to be considered (see loop stability section). Below a list of some suggested capacitor manufacturers. Loop Stability The stability of the loop is affected by the zero introduced by the output capacitor. The time constant of the zero is given by: This zero helps to increase the phase margin of the loop until the time constant is higher than some hundreds of nsec, depending also on the output voltage and current. So, using very low ESR ceramic capacitors could produce oscillations at the output, in particular when regulating high output voltages (adjustable version). To solve this issue is sufficient to add a small capacitor (e.g. 1nF to 10nF) in parallel to the high side resistor of the external divider, as shown in figure 9. Figure 9. Compensation Network Thermal Considerations Since the device is housed in a small SO(4+2+2) package the thermal issue can be the bottleneck of many ap- plications. The power dissipated by the device is given by: PDISS = (VIN - VOUT) · IOUT Manufacturer Type Cap Value ( µF) Rated Voltage (V) PANASONIC CERAMIC 1 to 47 4 to 16 TAYO YUDEN CERAMIC 1 to 47 4 to 16 TDK CERAMIC 1 to 47 4 to 16 TOKIN CERAMIC 1 to 47 4 to 16 SANYO POSCAP 1 to 47 4 to 16 PANASONIC SP 1 to 47 4 to 16 KEMET TANTALUM 1 to 47 4 to 16 TESR C OUT ⋅ = F ZERO 1 2 π ESR C OUT ⋅ ⋅ -------------------------------------------- = VOUT=1.2V TO 5V UP to 2A VIN=2V TO 14V C1 OUT 1 3 7 5 6 4 8 2 L6932D1.2 GND C2 IN EN ADJ R1 R2 C3 |
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