8

FN6563.2

October 30, 2007

Detailed Description

The ISL43210 bidirectional, single SPDT analog switch

offers precise switching capability from a single 2.7V to 12V

supply with low ON-resistance (19

Ω) and high speed

well suited to portable battery powered equipment thanks to

the low operating supply voltage (2.7V), low power

consumption (5µW), low leakage currents (3nA max), and the

tiny SOT-23 packaging. High frequency applications also

benefit from the wide bandwidth, and the very high off

isolation rejection.

Supply Sequencing and Overvoltage Protection

With any CMOS device, proper power supply sequencing is

required to protect the device from excessive input currents

which might permanently damage the IC. All I/O pins contain

ESD protection diodes from the pin to V+ and GND

(see Figure 8). To prevent forward biasing these diodes, V+

must be applied before any input signals, and input signal

voltages must remain between V+ and GND. If these

conditions cannot be guaranteed, then one of the following

two protection methods should be employed.

Logic inputs can easily be protected by adding a 1k

Ω

resistor in series with the input (see Figure 8). The resistor

limits the input current below the threshold that produces

permanent damage, and the sub-microamp input current

produces an insignificant voltage drop during normal

operation.

Adding a series resistor to the switch input defeats the

diodes can be added in series with the supply pins to provide

overvoltage protection for all pins (see Figure 8). These

additional diodes limit the analog signal from 1V below V+ to

1V above GND. The low leakage current performance is

unaffected by this approach, but the switch resistance may

increase, especially at low supply voltages.

Power-Supply Considerations

The ISL43210 construction is typical of most CMOS analog

switches, except that they have only two supply pins: V+ and

GND. V+ and GND drive the internal CMOS switches and

set their analog voltage limits. Unlike switches with a 13V

maximum supply voltage, the ISL43210 15V maximum

supply voltage provides plenty of room for the 10% tolerance

of 12V supplies, as well as room for overshoot and noise

spikes.

The minimum recommended supply voltage is 2.7V. It is

important to note that the input signal range, switching times,

and ON-resistance degrade at lower supply voltages. Refer

to the “Electrical Specification” tables beginning on page 5

and “Typical Performance Curves” beginning on page 9 for

details.

V+ and GND also power the internal logic and level shifter.

The level shifter convert the input logic levels to switched V+

and GND signals to drive the analog switch gate terminals.

This device cannot be operated with bipolar supplies,

because the input switching point becomes negative in this

configuration.

Logic-Level Thresholds

This switch is TTL compatible (0.8V and 2.4V) over a supply

about 2.5V. This is still below the TTL guaranteed high

output minimum level of 2.8V, but noise margin is reduced.

For best results with a 12V supply, use a logic family the

The digital input stages draw supply current whenever the

digital input voltage is not at one of the supply rails. Driving

the digital input signals from GND to V+ with a fast transition

time minimizes power dissipation.

High-Frequency Performance

In 50

Ω systems, signal response is reasonably flat even past

300MHz (see Figure 16). Figure 16 also illustrates that the

frequency response is very consistent over a wide V+ range,

and for varying analog signal levels.

An OFF switch acts like a capacitor and passes higher

frequencies with less attenuation, resulting in signal

feedthrough from a switch’s input to its output. Off isolation is

the resistance to this feedthrough. Figure 17 details the high

off isolation rejection provided by this part. At 10MHz, off

isolation is about 50dB in 50

Ω systems, decreasing

approximately 20dB per decade as frequency increases.

Higher load impedances decrease off isolation rejection due

to the voltage divider action of the switch OFF impedance

and the load impedance.

Leakage Considerations

Reverse ESD protection diodes are internally connected

between each analog-signal pin and both V+ and GND. One of

FIGURE 8. OVERVOLTAGE PROTECTION

GND

OPTIONAL PROTECTION

V+

DIODE

OPTIONAL PROTECTION

DIODE

OPTIONAL

PROTECTION

RESISTOR

ISL43210