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SM320VC5506PGE 데이터시트(PDF) 3 Page - Texas Instruments

부품명 SM320VC5506PGE
상세설명  Fixed-Point Digital Signal Processor
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제조업체  TI [Texas Instruments]
홈페이지  http://www.ti.com
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SM320VC5506PGE 데이터시트(HTML) 3 Page - Texas Instruments

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Revision History
3
October 2006 − Revised Janauary 2008
SPRS375C
REVISION HISTORY
This revision history highlights the technical changes made to SPRS375B to generate SPRS375C.
PAGE(S)
NO.
ADDITIONS/CHANGES/DELETIONS
17
Table 2−3, Signal Descriptions:
− Updated/changed GPIO.A[13:0] FUNCTION description from “... External Bus Selection Register is 11. ... enabling the
Data EMIF mode.” to “... External Bus Selection Register is 00, enabling the Data EMIF mode.”
18
Table 2−3, Signal Descriptions (Continued):
− Updated/changed A[15:14] RESET CONDITION description from “... GPIO0 = 0: Input, GPIO.A[15:14]” to “... GPIO0 = 0:
Reserved”
− Updated/changed D[15:0] FUNCTION description from “... The data bus keepers are disabled at reset, ...” to “... The
data bus keepers are enabled at reset, ...”.
37
Figure 3−5, External Bus Selection Register:
− Updated/changed reset value for Parallel Port Mode (EBSR.[1:0])
61
Table 3−31, External Bus Selection Register:
− Deleted “Hardware reset; x denotes a “don’t care.” footnote
− Updated/changed the “The reset value is ...” footnote
62
Table 3−32, Interrupt Table:
− Updated/changed the SOFTWARE (TRAP) EQUIVALENT “SINT10” to “Reserved”


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