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M27V401-200B6TR 데이터시트(PDF) 8 Page - STMicroelectronics

부품명 M27V401-200B6TR
상세설명  4 Mbit (512Kb x8) Low Voltage UV EPROM and OTP EPROM
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M27V401-200B6TR 데이터시트(HTML) 8 Page - STMicroelectronics

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PRESTO II Programming Algorithm
PRESTO II Programming Algorithm allows the
whole array to be programmed, with a guaranteed
margin, in a typical time of 52.5 seconds. Pro-
gramming with PRESTO II involves in applying a
sequence of 100
µs program pulses to each byte
until a correct verify occurs (see Figure 7). During
programming and verify operation, a MARGIN
MODE circuit is automatically activated in order to
guarantee that each cell is programmed with
enough margin. No overprogram pulse is applied
since the verify in MARGIN MODE at VCC much
higher than 3.6V provides necessary margin to
each programmed cell.
Program Inhibit
Programming of multiple M27V401s in parallel
with different data is also easily accomplished. Ex-
cept for E, all like inputs including G of the parallel
M27V401 may be common. A TTL low level pulse
applied to a M27V401’s E input with VPP at
12.75V, will program that M27V401. A high level E
input inhibits the other M27V401s from being pro-
grammed.
Program Verify
A verify (read) should be performed on the pro-
grammed bits to determine that they were correct-
ly programmed. The verify is accomplished with G
at VIL, E at VIH,VPP at 12.75V and VCC at 6.25V.
Figure 6. Programming and Verify Modes AC Waveforms
tAVPL
VALID
AI00725
A0-A18
Q0-Q7
VPP
VCC
G
DATA IN
DATA OUT
E
tQVEL
tVPHEL
tVCHEL
tEHQX
tELEH
tGLQV
tQXGL
tGHQZ
tGHAX
PROGRAM
VERIFY
Figure 7. Programming Flowchart
AI00760B
n= 0
Last
Addr
VERIFY
E = 100
µs Pulse
++n
=25
++ Addr
VCC = 6.25V, VPP = 12.75V
FAIL
CHECK ALL BYTES
1st: VCC =6V
2nd: VCC = 4.2V
YES
NO
YES
NO
YES
NO


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