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CAT28C513T14I-12T 데이터시트(PDF) 1 Page - Catalyst Semiconductor |
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CAT28C513T14I-12T 데이터시트(HTML) 1 Page - Catalyst Semiconductor |
1 / 11 page 1 CAT28C512/513 512K-Bit CMOS PARALLEL EEPROM FEATURES s Fast Read Access Times: 120/150 ns s Low Power CMOS Dissipation: –Active: 50 mA Max. –Standby: 200 µA Max. s Simple Write Operation: –On-Chip Address and Data Latches –Self-Timed Write Cycle with Auto-Clear s Fast Write Cycle Time: –5ms Max s CMOS and TTL Compatible I/O s Automatic Page Write Operation: –1 to 128 Bytes in 5ms –Page Load Timer s End of Write Detection: –Toggle Bit – DATA DATA DATA DATA DATA Polling s Hardware and Software Write Protection s 100,000 Program/Erase Cycles s 100 Year Data Retention s Commercial, Industrial and Automotive Temperature Ranges DESCRIPTION The CAT28C512/513 is a fast,low power, 5V-only CMOS parallel EEPROM organized as 64K x 8-bits. It requires a simple interface for in-system programming. On-chip address and data latches, self-timed write cycle with auto-clear and VCC power up/down write protection eliminate additional timing and protection hardware. DATA Polling and Toggle status bits signal the start and end of the self-timed write cycle. Additionally, the CAT28C512/513 features hardware and software write protection. The CAT28C512/513 is manufactured using Catalyst’s advanced CMOS floating gate technology. It is designed to endure 100,000 program/erase cycles and has a data retention of 100 years. The device is available in JEDEC approved 32-pin DIP, PLCC, 32-pin TSOP and 40-pin TSOP packages. BLOCK DIAGRAM 5096 FHD F02 © 2001 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice ADDR. BUFFER & LATCHES ADDR. BUFFER & LATCHES INADVERTENT WRITE PROTECTION CONTROL TIMER ROW DECODER COLUMN DECODER HIGH VOLTAGE GENERATOR A7–A15 CE OE WE A0–A6 I/O0–I/O7 I/O BUFFERS 65,536 x 8 E2PROM ARRAY 128 BYTE PAGE REGISTER VCC DATA POLLING AND TOGGLE BIT Doc. No. 1007, Rev. A |
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