SN54ALS1010A, SN74ALS1010A

TRIPLE 3INPUT POSITIVENAND BUFFERS

SDAS075A − D2661, APRIL 1982 − REVISED MAY 1986

POST OFFICE BOX 655303

POST OFFICE BOX 1443

Copyright

1

Outline DIPs and Ceramic Chip Carriers in

Addition to the Standard 300-mil Plastic

and Ceramic DIPs.

Reliability

description

These devices contain three independent 3-input

NAND buffers.

They

perform

the

Boolean

functions Y = A

⋅B⋅C or Y = A+B+C in positive logic.

The SN54ALS1010A is characterized for opera-

tion over the full military temperature range of

−55

°C to 125°C. The SN74ALS1010A is

characterized for operation from 0

°C to 70°C.

FUNCTION TABLE

(each gate)

INPUTS

OUTPUT

A

B

C

Y

H

H

H

L

L

XX

H

X

LX

H

X

X

L

H

1A

1

1B

2

3

2A

13

1C

5

2C

4

2B

10

3B

9

3A

11

3C

12

1Y

2Y

6

3Y

8

&

† This symbol is in accordance with ANSI/IEEE Std 91-1984 and

IEC Publication 617-12.

Pin numbers shown are for D, J, and N packages.

1A

1B

1C

1Y

2Y

2C

2B

2A

3Y

3C

3B

3A

logic diagram (positive logic)

1

2

3

4

5

6

7

14

13

12

11

10

9

8

1A

1B

2A

2B

2C

2Y

GND

1C

1Y

3C

3B

3A

3Y

SN54ALS1010A ...J PACKAGE

SN74ALS1010A . . . D OR N PACKAGE

(TOP VIEW)

3

2

1 20 19

910 11 12 13

4

5

6

7

8

18

17

16

15

14

1Y

NC

3C

NC

3B

2A

NC

2B

NC

2C

SN54ALS1010A . . . FK PACKAGE

(TOP VIEW)

NC − No internal connection

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.