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M74HC160C1R 데이터시트(PDF) 1 Page - STMicroelectronics |
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1 / 16 page M54/74HC160/161 M54/74HC162/163 April 1993 SYNCHRONOUS PRESETTABLE 4-BIT COUNTER B1R (Plastic Package) ORDER CODES : M54HCXXXF1R M74HCXXXM1R M74HCXXXB1R M74HCXXXC1R F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) PIN CONNECTIONS (top view) NC = No Inter- nal Con- DESCRIPTION . HIGH SPEED fMAX = 63 MHz (TYP.) AT VCC =5 V . LOW POWER DISSIPATION ICC =4 µA (MAX.) AT 25 °C . OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS . BALANCED PROPAGATION DELAYS tPLH =tPHL . HIGH NOISE IMMUNITY VNIH =VNIL =28 % VCC (MIN.) . WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V . PIN AND FUNCTION COMPATIBLE WITH 54/74LS160 ∼ 163 M54/74HC160 Decade, Asynchronous Clear M54/74HC161 Binary, Asynchronous Clear M54/74HC162 Decade, Synchronous Clear M54/74HC163 Binary, Synchronous Clear The M54/74HC160, 161, 162 and 163 are high speed CMOS SYNCHRONOUS PRESETTABLE COUNTERS fabricated with silicon gate C 2MOS technology. They have the same the high speed operation simi- lar to equivalent LSTTL while maintaining the CMOS low power dissipation. The M54/74HC160/162 are BCD Decade counters and the M54/74HC161/163 are 4 bit binary counter- s. The CLOCK input is active on the rising edge. Both LOAD and CLEAR inputs are active Low. Presetting of all four IC’s is synchronous on the ris- ing edge of the CLOCK. The function on the M54/74HC162/163 is syn- chronous to CLOCK, while the M54/74HC160/161 counters are cleared asynchronously. Two enable inputs (TE and PE) and CARRY output are provided to enable easy cascading of counters, which facilities easy implementation of N-bit counters without using external gates. All inputs are equipped with protection circuits against static discharge and transient excess volt- age. 1/16 |
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