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M59DR016C 데이터시트(PDF) 2 Page - STMicroelectronics |
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M59DR016C 데이터시트(HTML) 2 Page - STMicroelectronics |
2 / 37 page M59DR016C, M59DR016D 2/37 Figure 2. TFBGA Connections (Top view through package) AI04113 C B A 8 7 6 5 4 3 2 1 E D F A4 A7 VPP A8 A11 A13 A0 E DQ8 DQ5 DQ14 A16 VSS DQ0 DQ9 DQ3 DQ6 DQ15 VDDQ DQ1 DQ10 VDD DQ7 VSS DQ2 A2 A5 A17 W A10 A14 A1 A3 A6 NC NC A9 A12 A15 RP A18 DQ4 DQ13 G DQ12 DQ11 WP A19 Table 1. Signal Names A0-A19 Address Inputs DQ0-DQ15 Data Input/Outputs, Command Inputs E Chip Enable G Output Enable W Write Enable RP Reset/Power Down WP Write Protect VDD Supply Voltage VDDQ Supply Voltage for Input/Output Buffers VPP Optional Supply Voltage for Fast Program & Erase VSS Ground NC Not Connected Internally DESCRIPTION The M59DR016 is a 16 Mbit non-volatile Flash memory that may be erased electrically at block level and programmed in-system on a Word-by- Word basis using a 1.65V to 2.2V VDD supply for the circuitry. For Program and Erase operations the necessary high voltages are generated inter- nally. The device supports asynchronous page mode from all the blocks of the memory array. The array matrix organization allows each block to be erased and reprogrammed without affecting other blocks. All blocks are protected against pro- gramming and erase at Power Up. Blocks can be unprotected to make changes in the application and then reprotected. Instructions for Read/Reset, Auto Select, Write Configuration Register, Programming, Block Erase, Bank Erase, Erase Suspend, Erase Re- sume, Block Protect, Block Unprotect, Block Lock- ing, CFI Query, are written to the memory through a Command Interface using standard micropro- cessor write timings. The device is offered in TFBGA48 (0.75 mm pitch) packages and it is supplied with all the bits erased (set to ‘1’). |
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