전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

LM3S8730-IQC20-A0 데이터시트(PDF) 49 Page - List of Unclassifed Manufacturers

부품명 LM3S8730-IQC20-A0
상세설명  Microcontroller
Download  502 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  ETC2 [List of Unclassifed Manufacturers]
홈페이지  
Logo ETC2 - List of Unclassifed Manufacturers

LM3S8730-IQC20-A0 데이터시트(HTML) 49 Page - List of Unclassifed Manufacturers

Back Button LM3S8730-IQC20-A0 Datasheet HTML 45Page - List of Unclassifed Manufacturers LM3S8730-IQC20-A0 Datasheet HTML 46Page - List of Unclassifed Manufacturers LM3S8730-IQC20-A0 Datasheet HTML 47Page - List of Unclassifed Manufacturers LM3S8730-IQC20-A0 Datasheet HTML 48Page - List of Unclassifed Manufacturers LM3S8730-IQC20-A0 Datasheet HTML 49Page - List of Unclassifed Manufacturers LM3S8730-IQC20-A0 Datasheet HTML 50Page - List of Unclassifed Manufacturers LM3S8730-IQC20-A0 Datasheet HTML 51Page - List of Unclassifed Manufacturers LM3S8730-IQC20-A0 Datasheet HTML 52Page - List of Unclassifed Manufacturers LM3S8730-IQC20-A0 Datasheet HTML 53Page - List of Unclassifed Manufacturers Next Button
Zoom Inzoom in Zoom Outzoom out
 49 / 502 page
background image
12. Release the RST signal.
The JTAG-to-SWD and SWD-to-JTAG switch sequences are described in “ARM Serial Wire Debug
(SWD)” on page 49. When performing switch sequences for the purpose of recovering the debug
capabilities of the device, only steps 1 and 2 of the switch sequence need to be performed.
5.2.4.2
ARM Serial Wire Debug (SWD)
In order to seamlessly integrate the ARM Serial Wire Debug (SWD) functionality, a serial-wire
debugger must be able to connect to the Cortex-M3 core without having to perform, or have any
knowledge of, JTAG cycles. This is accomplished with a SWD preamble that is issued before the
SWD session begins.
The preamble used to enable the SWD interface of the SWJ-DP module starts with the TAP controller
in the Test-Logic-Reset state. From here, the preamble sequences the TAP controller through the
following states: Run Test Idle, Select DR, Select IR, Test Logic Reset, Test Logic Reset, Run Test
Idle, Run Test Idle, Select DR, Select IR, Test Logic Reset, Test Logic Reset, Run Test Idle, Run
Test Idle, Select DR, Select IR, and Test Logic Reset states.
Stepping through this sequences of the TAP state machine enables the SWD interface and disables
the JTAG interface. For more information on this operation and the SWD interface, see the ARM®
Cortex™-M3 Technical Reference Manual and the ARM® CoreSight Technical Reference Manual.
Because this sequence is a valid series of JTAG operations that could be issued, the ARM JTAG
TAP controller is not fully compliant to the IEEE Standard 1149.1. This is the only instance where
the ARM JTAG TAP controller does not meet full compliance with the specification. Due to the low
probability of this sequence occurring during normal operation of the TAP controller, it should not
affect normal performance of the JTAG interface.
JTAG-to-SWD Switching
To switch the operating mode of the Debug Access Port (DAP) from JTAG to SWD mode, the
external debug hardware must send a switch sequence to the device. The 16-bit switch sequence
for switching to SWD mode is defined as b1110011110011110, transmitted LSB first. This can also
be represented as 16'hE79E when transmitted LSB first. The complete switch sequence should
consist of the following transactions on the TCK/SWCLK and TMS/SWDIO signals:
1.
Send at least 50 TCK/SWCLK cycles with TMS/SWDIO set to 1. This ensures that both JTAG and
SWD are in their reset/idle states.
2.
Send the 16-bit JTAG-to-SWD switch sequence, 16'hE79E.
3.
Send at least 50 TCK/SWCLK cycles with TMS/SWDIO set to 1. This ensures that if SWJ-DP was
already in SWD mode, before sending the switch sequence, the SWD goes into the line reset
state.
SWD-to-JTAG Switching
To switch the operating mode of the Debug Access Port (DAP) from SWD to JTAG mode, the
external debug hardware must send a switch sequence to the device. The 16-bit switch sequence
for switching to JTAG mode is defined as b1110011110011110, transmitted LSB first. This can also
be represented as 16'hE73C when transmitted LSB first. The complete switch sequence should
consist of the following transactions on the TCK/SWCLK and TMS/SWDIO signals:
1.
Send at least 50 TCK/SWCLK cycles with TMS/SWDIO set to 1. This ensures that both JTAG and
SWD are in their reset/idle states.
49
September 02, 2007
Preliminary
LM3S8730 Microcontroller


유사한 부품 번호 - LM3S8730-IQC20-A0

제조업체부품명데이터시트상세설명
logo
Texas Instruments
LM3S8730-IQC20-A2 TI-LM3S8730-IQC20-A2 Datasheet
4Mb / 551P
[Old version datasheet]   Stellaris짰 LM3S8730 Microcontroller
LM3S8730-IQC20-A2T TI-LM3S8730-IQC20-A2T Datasheet
4Mb / 551P
[Old version datasheet]   Stellaris짰 LM3S8730 Microcontroller
More results

유사한 설명 - LM3S8730-IQC20-A0

제조업체부품명데이터시트상세설명
logo
Advanced Micro Devices
ELANSC520 AMD-ELANSC520 Datasheet
6Mb / 440P
   Microcontroller
logo
Texas Instruments
LM3S9B92-IQC80-C5 TI1-LM3S9B92-IQC80-C5 Datasheet
273Kb / 3P
[Old version datasheet]   Microcontroller
LM4F112C4QC TI1-LM4F112C4QC Datasheet
5Mb / 1189P
[Old version datasheet]   Microcontroller
logo
Bookham, Inc.
LM3S818 BOOKHAM-LM3S818 Datasheet
2Mb / 395P
   Microcontroller
logo
List of Unclassifed Man...
LM3S2965 ETC2-LM3S2965 Datasheet
5Mb / 542P
   Microcontroller
LM3S1960 ETC2-LM3S1960 Datasheet
4Mb / 492P
   Microcontroller
LM3S6916 ETC2-LM3S6916 Datasheet
5Mb / 535P
   Microcontroller
LM3S817 ETC2-LM3S817 Datasheet
2Mb / 379P
   Microcontroller
LM3S801 ETC2-LM3S801 Datasheet
2Mb / 397P
   Microcontroller
LM3S617 ETC2-LM3S617 Datasheet
2Mb / 379P
   Microcontroller
LM3S612 ETC2-LM3S612 Datasheet
2Mb / 419P
   Microcontroller
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


데이터시트 다운로드

Go To PDF Page


링크 URL




개인정보취급방침
ALLDATASHEET.CO.KR
ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com