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Description
Reset
Type
Name
Bit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0
RO
reserved
5
PLL Present
When set, indicates that the on-chip Phase Locked Loop (PLL) is
present.
1
RO
PLL
4
Watchdog Timer Present
When set, indicates that a watchdog timer is present.
1
RO
WDT
3
SWO Trace Port Present
When set, indicates that the Serial Wire Output (SWO) trace port is
present.
1
RO
SWO
2
SWD Present
When set, indicates that the Serial Wire Debugger (SWD) is present.
1
RO
SWD
1
JTAG Present
When set, indicates that the JTAG debugger interface is present.
1
RO
JTAG
0
September 02, 2007
82
Preliminary
System Control